202 Publications

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[202]
2017 | Report | PUB-ID: 2913643 PUB | PDF | DOI
 
[201]
2017 | Journal Article | PUB-ID: 2909430
FPGA-based Multi-Robot Tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2017)
Journal of Parallel and Distributed Computing 107: 146-161.
PUB | DOI
 
[200]
2017 | Journal Article | PUB-ID: 2912818
M2DC – Modular Microserver DataCentre with heterogeneous hardware
Oleksiak A, Kierzynka M, Piatek W, Agosta G, Barenghi A, Porrmann M, Hagemeyer J, Griessl R, Lachmair J, Peykanu M, Tigges L, et al. (2017)
Microprocessors and Microsystems 52: 117-130.
PUB | DOI
 
[199]
2017 | Conference Paper | PUB-ID: 2909044
From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining
Lachmair J, Mieth T, Griessl R, Hagemeyer J, Porrmann M (2017)
In: International Joint Conference on Neural Networks (IJCNN 2017). 4299-4308.
PUB
 
[198]
2017 | Conference Paper | PUB-ID: 2912816
Comparing synchronous, mesochronous and asynchronous NoCs for GALS based MPSoC
Ax J, Kucza N, Vohrmann M, Jungeblut T, Porrmann M, Rückert U (Accepted)
In: IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17).
PUB
 
[197]
2017 | Conference Paper | PUB-ID: 2912815
Reconfigurable Vision Processing System for Player Tracking in Indoor Sports
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (Accepted)
In: Conference on Design and Architectures for Signal and Image Processing (DASIP 2017).
PUB
 
[196]
2017 | Conference Paper | PUB-ID: 2909584
M2DC: Modular Microserver Datacentre with Heterogeneous Hardware
Oleksiak A, Kierzynka M, Piatek W, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, et al. (2017)
Presented at the Energy-efficient Servers for Cloud and Edge Computing 2017 Workshop (ENeSCE 2017) - co-located with HiPEAC 2017, Stockholm, Sweden.
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[195]
2017 | Book Chapter | PUB-ID: 2908972
The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio
Sievers G, Hübener B, Ax J, Flasskamp M, Kelly W, Jungeblut T, Porrmann M (2017)
In: Computing Platforms for Software-Defined Radio. Hussain W, Nurmi J, Isoaho J, Garzia F (Eds); Cham, Switzerland: Springer International Publishing: 29--59.
PUB | DOI
 
[194]
2016 | Conference Abstract | PUB-ID: 2909602
FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers
Griessl R, Peykanu M, Tigges L, Hagemeyer J, Porrmann M (2016)
Presented at the Workshop "Reconfigurable Computing — From Embedded Systems to Reconfigurable Hyperscale Servers" co-located with the International Conference on Field-Programmable Logic and Applications (FPL 2016), Lausanne, Switzerland.
PUB
 
[193]
2016 | Journal Article | PUB-ID: 2908973
OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems
Cozzi D, Korf S, Cassano L, Hagemeyer J, Domenici A, Bernardeschi C, Porrmann M, Sterpone L (2016)
IEEE Transactions on Emerging Topics in Computing PP(99): 1-1.
PUB | DOI
 
[192]
2016 | Conference Paper | PUB-ID: 2900363
Performance Estimation of Streaming Applications for Hierarchical MPSoCs
Flasskamp M, Sievers G, Ax J, Klarhorst C, Jungeblut T, Kelly W, Thies M, Porrmann M (2016)
In: Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO). ACM Press.
PUB | PDF | DOI
 
[191]
2016 | Conference Paper | PUB-ID: 2908974
Data centres for IoT applications: The M2DC approach (Invited paper)
Oleksiak A, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, Christmann W, vor dem Berge M, Krupop S, Cudennec L, Cecowski M, et al. (2016)
In: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS). 293-299.
PUB | DOI
 
[190]
2016 | Conference Paper | PUB-ID: 2908980
The M2DC Project: Modular Microserver DataCentre
Cecowski M, Agosta G, Oleksiak A, Kierzynka M, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, et al. (2016)
In: 2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers (IEEE).
PUB | DOI
 
[189]
2015 | Conference Paper | PUB-ID: 2783142
System-Level Analysis of Network Interfaces for Hierarchical MPSoCs
Ax J, Sievers G, Flasskamp M, Kelly W, Jungeblut T, Porrmann M (2015)
In: Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc). New York, NY, USA: ACM: 3-8.
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[188]
2015 | Conference Paper | PUB-ID: 2732427
Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI
Sievers G, Ax J, Kucza N, Flasskamp M, Jungeblut T, Kelly W, Porrmann M, Rückert U (2015)
In: 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE: 1925-1928.
PUB | DOI
 
[187]
2015 | Conference Paper | PUB-ID: 2760622
Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI
Sievers G, Daberkow J, Ax J, Flasskamp M, Kelly W, Jungeblut T, Porrmann M, Rückert U (2015)
In: International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC). IEEE: 175-181.
PUB | DOI
 
[186]
2015 | Conference Paper | PUB-ID: 2732419
Automatische Protokollanpassung von Echtzeit-Ethernet-Standards durch FPGA-Technologien
Buda A, Walter M, Hartfiel J, Ax J, Nussbaum K, Jungeblut T, Porrmann M (2015)
Presented at the Automation 2015, Baden-Baden.
PUB
 
[185]
2015 | Conference Paper | PUB-ID: 2902039
FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, vor dem Berge M, Kosmann L, Knocke P, Kierzynka M, Oleksiak A (2015)
Presented at the First International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC‘15), held in conjunction with Supercomputing 2015, Austin Texas, USA.
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[184]
2015 | Conference Paper | PUB-ID: 2902041
A 65 nm Standard Cell Library for Ultra Low-power Applications
Vohrmann M, Chatterjee S, Lütkemeier S, Jungeblut T, Porrmann M, Rückert U (2015)
Presented at the 22nd European Conference on Circuit Theory and Design, ECCTD2015, Trondheim, Norway.
PUB | DOI
 
[183]
2015 | Conference Paper | PUB-ID: 2901108
FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-8.
PUB | DOI
 
[182]
2015 | Conference Paper | PUB-ID: 2901107
A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-6.
PUB | DOI
 
[181]
2015 | Conference Paper | PUB-ID: 2732431
Datenflussmodellierung als Methode zur Optimierung von Entwicklungsprozessen am Beispiel der Leiterplattenentwicklung
Herbrechtsmeier S, Jungeblut T, Porrmann M (2015)
In: Entwurf mechatronischer Systeme., 343. Paderborn: HNI Verlagsschriftenreihe.
PUB
 
[180]
2014 | Conference Paper | PUB-ID: 2681323
Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications
Sabena D, Sterpone L, Schölzel M, Koal T, Vierhaus HT, Wong S, Glein R, Rittner F, Stender C, Porrmann M, Hagemeyer J (2014)
In: Proceedings of 19th IEEE European Test Symposium (ETS). 175-182.
PUB | DOI
 
[179]
2014 | Conference Paper | PUB-ID: 2698930
A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, Vor dem Berge M, Kiesel T, Christmann W (2014)
In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014. IEEE: 146-153.
PUB | DOI
 
[178]
2014 | Conference Paper | PUB-ID: 2698992
FPGA-based Generic Architecture for Rapid Prototyping of Video Hardware Accelerators using NoC AXI4-Stream Interconnect and GigE Vision Camera Interfaces
Irwansyah A, Ibraheem OW, Klimeck D, Porrmann M, Rückert U (2014)
Presented at the Bildverarbeitung in der Automation (BVAu) 2014, Lemgo, Germany.
PUB
 
[177]
2014 | Conference Paper | PUB-ID: 2698994
Dynamische Rekonfiguration von Echtzeit-Ethernet-Standards mit harten Echtzeit­anforderungen
Walter M, Ax J, Buda A, Nussbaum K, Hartfiel J, Jungeblut T, Porrmann M (2014)
Presented at the Kommunikation in der Automation – KommA 2014, Lemgo, Germany.
PUB
 
[176]
2014 | Conference Paper | PUB-ID: 2698999
Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems
Sorrenti D, Cozzi D, Korf S, Cassano L, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the 17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Amsterdam, The Netherlands.
PUB | DOI
 
[175]
2014 | Conference Paper | PUB-ID: 2681362
An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems
Cassano L, Cozzi D, Jungewelter D, Korf S, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the DTIS 2014, 9th International conference on Design & Technology of Integrated Systems in Nanoscale Era, Santorini , Greece.
PUB | DOI
 
[174]
2014 | Conference Paper | PUB-ID: 2699005
AXI-based SpaceFibre IP CORE Implementation
Cozzi D, Jungewelter D, Kleibrink D, Korf S, Hagemeyer J, Porrmann M, Ilstad J (2014)
Presented at the 6th International SpaceWire Conference, Athens, Greece.
PUB | DOI
 
[173]
2014 | Conference Paper | PUB-ID: 2698929
CoreVA: A Configurable Resource-efficient VLIW Processor Architecture
Hübener B, Sievers G, Jungeblut T, Porrmann M, Rückert U (2014)
In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing. IEEE: 9-16.
PUB | DOI
 
[172]
2014 | Book Chapter | PUB-ID: 2732400
Development of Self-Optimizing Systems
Gausemeier J, Korf S, Porrmann M, Stahl K, Sudmann O, Vaßholz M (2014)
In: Design Methodology for Intelligent Technical Systems – Develop Intelligent Technical Systems of the Future. Gausemeier J, Rammig FJ, Schäfer W (Eds); Berlin Heidelberg: Springer Verlag: 65-117.
PUB | DOI
 
[171]
2014 | Book Chapter | PUB-ID: 2732260
Methods of Improving the Dependability of Self-optimizing Systems
Seifried A, Trächtler A, Kleinjohann B, Korf S, Porrmann M, Heinzemann C, Rasche C, Sondermann-Woelke C, Priesterjahn C, Steenken D, Rammig F-J, et al. (2014)
In: Dependability of Self-Optimizing Mechatronic Systems. Gausemeier J, Rammig FJ, Schäfer W, Sextro W (Eds); Lecture Notes in Mechanical Engineering. Berlin Heidelberg: Springer Verlag: 37-171.
PUB | DOI
 
[170]
2013 | Journal Article | PUB-ID: 2575531
A reconfigurable neuroprocessor for self-organizing feature maps
Lachmair J, Merényi E, Porrmann M, Rückert U (2013)
Neurocomputing 112(SI): 189-199.
PUB | DOI | WoS
 
[169]
2013 | Conference Paper | PUB-ID: 2634649
Pareto-optimal Signal Processing on Low-Power Microprocessors
Christ P, Sievers G, Einhaus J, Jungeblut T, Porrmann M, Rückert U (2013)
In: Proceedings of the 12th IEEE International Conference on SENSORS. 1843-1846.
PUB | DOI
 
[168]
2013 | Conference Paper | PUB-ID: 2681289
Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience
Desogus M, Sterpone L, Porrmann M, Hagemeyer J, Illstad J (2013)
In: RADECS proceedings., 2. IEEE / Institute of Electrical and Electronics Engineers: 13-16.
PUB
 
[167]
2013 | Conference Paper | PUB-ID: 2681304
Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture
Sterpone L, Sabena D, Ullah A, Porrmann M, Hagemeyer J, Ilstad J (2013)
In: Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on. 184-188.
PUB | DOI
 
[166]
2013 | Journal Article | PUB-ID: 2622226
A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing
Sterpone L, Porrmann M, Hagemeyer J (2013)
IEEE Transactions on Computers 62(8): 1508-1525.
PUB | DOI | WoS
 
[165]
2013 | Conference Paper | PUB-ID: 2576115
Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme
Korf S, Sievers G, Ax J, Cozzi D, Jungeblut T, Hagemeyer J, Porrmann M, Rückert U (2013)
In: Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme. HNI-Verlagsschriftenreihe. 79-90.
PUB | PDF
 
[164]
2013 | Conference Paper | PUB-ID: 2637667
Design-Space Exploration of the Configurable 32 bit VLIW Processor CoreVA for Signal Processing Applications
Sievers G, Christ P, Einhaus J, Jungeblut T, Porrmann M, Rückert U (2013)
In: 2013 NORCHIP.
PUB | DOI
 
[163]
2013 | Journal Article | PUB-ID: 2634614
A Systematic Approach for Optimized Bypass Configurations for Application-specific Embedded Processors
Jungeblut T, Hübener B, Porrmann M, Rückert U (2013)
ACM Trans. Embed. Comput. Syst. 13(2): 1-25.
PUB | DOI | WoS
 
[162]
2013 | Conference Paper | PUB-ID: 2576042
On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems
Cassano L, Cozzi D, Korf S, Hagemeyer J, Porrmann M, Sterpone L (2013)
In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013. Piscataway, NJ: IEEE: 717-720.
PUB | DOI
 
[161]
2013 | Journal Article | PUB-ID: 2560236
A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control
Lütkemeier S, Jungeblut T, Berge HKO, Aunet S, Porrmann M, Rückert U (2013)
IEEE Journal Of Solid-State Circuits 48(1): 8-19.
PUB | DOI | WoS
 
[160]
2012 | Conference Paper | PUB-ID: 2493814
Mini-Robot's Performance Optimization via Online Reconfiguration and HW/SW Task Scheduling.
Durelli G, Santambrogio MD, Cresci F, Porrmann M, Sciuto D (2012)
In: 19th Reconfigurable Architectures Workshop (RAW 2012).
PUB | DOI
 
[159]
2012 | Conference Paper | PUB-ID: 2559365
Optimizing inter-FPGA communication by automatic channel adaptation
Romoth J, Jungewelter D, Hagemeyer J, Porrmann M, Rückert U (2012)
In: Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on. 1-7.
PUB | DOI
 
[158]
2012 | Conference Paper | PUB-ID: 2493813
A TCMS-based architecture for GALS NoCs.
Jungeblut T, Ax J, Porrmann M, Rückert U (2012)
In: 2012 IEEE International Symposium on Circuits and Systems.
PUB | DOI
 
[157]
2012 | Conference Paper | PUB-ID: 2493811
gNBXe - a Reconfigurable Neuroprocessor for Various Types of Self-Organizing Maps
Lachmair J, Merenyi E, Porrmann M, Rückert U (2012)
In: European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning. 645-650.
PUB
 
[156]
2012 | Conference Paper | PUB-ID: 2517354
A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing
Hagemeyer J, Hilgenstein A, Jungewelter D, Cozzi D, Felicetti C, Rückert U, Korf S, Köster M, Margaglia F, Porrmann M, Dittmann F, et al. (2012)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems., (AHS-2012). 9-16.
PUB
 
[155]
2012 | Conference Paper | PUB-ID: 2475063
A 200mV 32b Subthreshold Processor with Adaptive Supply Voltage Control
Lütkemeier S, Jungeblut T, Porrmann M, Rückert U (2012)
In: Proc. of the International Solid-State Circuits Conference (ISSCC). 484-485.
PUB | DOI
 
[154]
2011 | Conference Abstract | PUB-ID: 2494497
Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications
Köster M, Hagemeyer J, Margaglia F, Porrmann M, Dittmann F, Ditze M, Sterpone L, Harris J, Ilstad J (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[153]
2011 | Conference Paper | PUB-ID: 2476993
Resource Efficiency of Scalable Processor Architectures for SDR-based Applications (Invited)
Jungeblut T, Ax J, Sievers G, Hübener B, Porrmann M, Rückert U (2011)
In: Proc. of the Radar, Communication and Measurement Conference (RADCOM).
PUB | Files available
 
[152]
2011 | Conference Paper | PUB-ID: 2493819
Analysis of SEU Effects in Partially Reconfigurable SoPCs.
Sterpone L, Margaglia F, Köster M, Hagemeyer J, Porrmann M (2011)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011). 129-136.
PUB | DOI
 
[151]
2011 | Conference Paper | PUB-ID: 2494507
Fast Design-space Exploration with FPGA Cluster
Romoth J, Hagemeyer J, Porrmann M, Rückert U (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[150]
2011 | Journal Article | PUB-ID: 2493623
Applying dynamic reconfiguration in the mobile robotics domain: a case study on computer vision algorithms.
Nava F, Sciuto D, Santambrogio MD, Herbrechtsmeier S, Porrmann M, Witkowski U, Rückert U (2011)
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4(3): 1-22.
PUB | DOI | WoS
 
[149]
2011 | Book Chapter | PUB-ID: 2018536
Design-space Exploration for Flexible WLAN Hardware
Jungeblut T, Liß C, Porrmann M, Rückert U (2011)
In: Cross Layer Designs in WLAN Systems. Zorba N, Skianis C, Verikoukis C (Eds); Leicester, UK: Troubador Publishing: 521-564.
PUB
 
[148]
2011 | Conference Paper | PUB-ID: 2494510
A Low-Power Vision Processing Platform for Mobile Robots
Griessl R, Herbrechtsmeier S, Porrmann M, Rückert U (2011)
In: Proceedings of the FPL2011 Workshop on Computer Vision on Low-Power Reconfigurable Architectures.
PUB
 
[147]
2011 | Conference Paper | PUB-ID: 2493823
Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.
Grawinkel M, Schäfers T, Brinkmann A, Hagemeyer J, Porrmann M (2011)
In: MASCOTS2011 The 19th Annual Meeting of the IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems. 297-306.
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[146]
2011 | Conference Paper | PUB-ID: 2286173
Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs
Korf S, Cozzi D, Koester M, Hagemeyer J, Porrmann M, Rückert U, Santambrogio MD (2011)
In: Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on. 125-132.
PUB
 
[145]
2010 | Conference Paper | PUB-ID: 2472693
RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing
Porrmann M, Hagemeyer J, Pohl C, Romoth J, Strugholtz M (2010)
In: Parallel Computing: From Multicores and GPU's to Petascale, Advances in Parallel Computing., 19. IOS press: 592-599.
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[144]
2010 | Conference Paper | PUB-ID: 2493826
Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.
Dittmann F, Linke M, Hagemeyer J, Köster M, Lallet J, Pohl C, Porrmann M, Harris J, Ilstad J (2010)
In: Proceedings of the International SpaceWire Conference 2010. 193-196.
PUB
 
[143]
2010 | Conference Paper | PUB-ID: 2018564
High Level Specification of Embedded Listeners for Monitoring of Network-on-Chips
Puttmann C, Porrmann M, Grassi PR, Santambrogio MD, Rückert U (2010)
In: Proceedings of the IEEE International Symposium on Circuits and Systems. 3333-3336.
PUB | DOI
 
[142]
2010 | Journal Article | PUB-ID: 2145423
Design Optimizations for Tiled Partially Reconfigurable Systems
Koester M, Luk W, Hagemeyer J, Porrmann M, Rückert U (2010)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19(6): 1048-1061.
PUB | DOI | WoS
 
[141]
2010 | Journal Article | PUB-ID: 2018557
Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis
Purnaprajna M, Porrmann M, Rückert U, Hussmann M, Thies M, Kastens U (2010)
ACM Transactions on Reconfigurable Technology 3(3): 1-25.
PUB | DOI | WoS
 
[140]
2010 | Conference Paper | PUB-ID: 2018549
Design Space Exploration for Memory Subsystems of VLIW Architectures
Jungeblut T, Sievers G, Porrmann M, Rückert U (2010)
In: 5th IEEE International Conference on Networking, Architecture, and Storage. 377-385.
PUB | DOI
 
[139]
2010 | Patent | PUB-ID: 2494087
Mehrprozessor-Computersystem
Christmann W, Strugholtz M, Hagemeyer J, Porrmann M (2010) .
PUB
 
[138]
2010 | Conference Paper | PUB-ID: 2286616
A Framework for the Design Space Exploration of Software-Defined Radio Applications
Jungeblut T, Dreesen R, Porrmann M, Thies M, Rückert U, Kastens U (2010) .
PUB
 
[137]
2010 | Conference Paper | PUB-ID: 2286628
A modular design flow for very large design space explorations
Jungeblut T, Lütkemeier S, Sievers G, Porrmann M, Rückert U (2010) .
PUB | Files available
 
[136]
2010 | Journal Article | PUB-ID: 2018541
Resource Efficiency of Hardware Extensions of a 4-issue VLIW Processor for Elliptic Curve Cryptography
Jungeblut T, Puttmann C, Dreesen R, Porrmann M, Thies M, Rückert U, Kastens U (2010)
Advances in Radio Science 8: 295-305.
PUB | PDF | DOI
 
[135]
2010 | Conference Paper | PUB-ID: 2286622
Extending GigaNoC towards a Dependable Network-on-Chip
Puttmann C, Porrmann M, Rückert U (2010)
In: Digest of the DAC Workshop on Diagnostic Services in Network-on-Chips (DSNOC).
PUB
 
[134]
2010 | Journal Article | PUB-ID: 2494479
vMAGIC – Automatic Code Generation for VHDL
Pohl C, Fuest R, Porrmann M (2010)
newsletter edacentrum 2009: 1-9.
PUB | DOI
 
[133]
2009 | Conference Paper | PUB-ID: 2144891
FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications
Paiz C, Pohl C, Radkowski R, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia: 372-375.
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[132]
2009 | Conference Paper | PUB-ID: 2144752
Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing
Purnaprajna M, Pohl C, Porrmann M, Rückert U (2009)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'09, July 13-16, 2009, Las Vegas, Nevada, USA. 119-125.
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[131]
2009 | Journal Article | PUB-ID: 2144870
Run-time reconfigurability in embedded multiprocessors
Purnaprajna M, Porrmann M, Rückert U (2009)
ACM SIGARCH Computer Architecture News 37(2): 30-37.
PUB | DOI
 
[130]
2009 | Conference Paper | PUB-ID: 2493880
Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance
Porrmann M, Purnaprajna M, Puttmann C (2009)
In: NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). 467-473.
PUB | DOI
 
[129]
2009 | Conference Paper | PUB-ID: 2472678
Rapid Prototyping of Next-Generation Multiprocessor SoCs
Porrmann M, Hagemeyer J, Romoth J, Strugholtz M (2009)
In: Proceedings of Semiconductor Conference Dresden, SCD 2009. Dresden, Germany.
PUB
 
[128]
2009 | Conference Paper | PUB-ID: 2144880
Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks
Pohl C, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Sydney, Australia: 368-371.
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[127]
2009 | Journal Article | PUB-ID: 2493628
vMAGIC - Automatic Code Generation for VHDL
Pohl C, Paiz C, Porrmann M (2009)
International Journal of Reconfigurable Computing, Hindawi Publishing Corporation, 2009(Article ID 205149): 1-9.
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[126]
2009 | Conference Paper | PUB-ID: 2494485
Manageable Dynamic Reconfiguration with EVE – Extendable VHDL Editor
Pohl C, Fuest R, Porrmann M (2009)
In: Design Automation and Test in Europe (DATE), University Booth.
PUB
 
[125]
2009 | Conference Paper | PUB-ID: 2493855
Towards Real-Time Implementation of Coherent Optical Communication
Pfau T, Peveling R, Herath V, Hoffmann S, Wördehoff C, Adamczyk O, Porrmann M, Noe R (2009)
In: Proceedings of OFC/NFOEC 2009.
PUB | DOI
 
[124]
2009 | Conference Paper | PUB-ID: 2144843
FPGA-Based Realization of Self-Optimizing Drive-Controllers
Paiz C, Hagemeyer J, Pohl C, Porrmann M, Rückert U, Schulz B, Peters W, Böcker J (2009)
In: the 35th Annual Conference of the IEEE Industrial Electronics Society (IECON 2009). 2868-2873.
PUB | PDF | DOI
 
[123]
2009 | Conference Paper | PUB-ID: 2144772
InCyte ChipEstimator in Research and Education
Liß C, Porrmann M, Rückert U (2009)
In: CDNLive EMEA 2009.
PUB
 
[122]
2009 | Conference Paper | PUB-ID: 2144782
Early Exploration of Network Processor Architectures Using Cadence InCyte Chip Estimator
Liß C, Porrmann M, Rückert U (2009)
In: CDNLive EMEA 2009.
PUB
 
[121]
2009 | Conference Paper | PUB-ID: 2472673
Design Optimizations to Improve Placeability of Partial Reconfiguration Modules
Koester M, Luk W, Hagemeyer J, Porrmann M (2009)
In: Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009). ACM Press.
PUB | DOI
 
[120]
2009 | Conference Paper | PUB-ID: 2144830
Design Space Exploration for Next Generation Wireless Technologies (invited talk).
Jungeblut T, Klassen D, Dreesen R, Porrmann M, Thies M, Rückert U, Kastens U (2009)
In: Proc. of the Electrical and Electronic Engineering for Communication Conference (EEEfCOM) 2009.
PUB
 
[119]
2009 | Conference Paper | PUB-ID: 2493834
Cipset for a Coherent Polarization-Multiplexed QPSK Receiver
Herath V, Peveling R, Pfau T, Adamczyk O, Hoffmann S, Wördehoff C, Porrmann M, Noe R (2009)
In: Proceedings of OFC/NFOEC 2009.
PUB | DOI
 
[118]
2009 | Conference Paper | PUB-ID: 2472686
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems
Grassi PR, Santambrogio M, Hagemeyer J, Pohl C, Porrmann M (2009)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '09). Las Vegas, USA: 174-180.
PUB
 
[117]
2009 | Conference Paper | PUB-ID: 2144724
Reconfiguration Viewer
Grassi PR, Pohl C, Porrmann M (2009)
In: Design Automation and Test in Europe, DATE University Booth. Nice, France.
PUB | PDF
 
[116]
2009 | Conference Paper | PUB-ID: 2493870
A High Level Methodology for Monitoring Network-on-Chips
Grassi PR, Santambrogio M, Puttmann C, Pohl C, Porrmann M (2009)
In: Diagnostic Services in Network-on-Chips (DSNOC 2009), Workshop at Design, Automation and Test in Europe.
PUB
 
[115]
2009 | Conference Paper | PUB-ID: 2144757
A Synchronization Method for Register Traces of Pipelined Processors
Dreesen R, Jungeblut T, Thies M, Porrmann M, Rückert U, Kastens U (2009)
In: Proceedings of the International Embedded Systems Symposium 2009 (IESS '09). Schloss Langenargen, Germany: 207-217.
PUB
 
[114]
2008 | Conference Paper | PUB-ID: 2493929
Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography
Purnaprajna M, Puttmann C, Porrmann M (2008)
In: Proceedings of DATE '08: Design, Automation and Test in Europe. 1462-1467.
PUB | DOI
 
[113]
2008 | Journal Article | PUB-ID: 2493684
Coherent optical communication: Towards realtime systems at 40 Gbit/s and beyond
Pfau T, Hoffmann S, Adamczyk O, Peveling R, Herath V, Porrmann M, Noe R (2008)
Optics Express 16(2): 866-872.
PUB | DOI | WoS | PubMed | Europe PMC
 
[112]
2008 | Journal Article | PUB-ID: 2289175
Hardware Accelerators for Elliptic Curve Cryptography
Puttmann C, Shokrollahi J, Porrmann M, Rückert U (2008)
Advances in Radio Science 6: 259-264.
PUB | PDF | DOI
 
[111]
2008 | Journal Article | PUB-ID: 2289237
Realtime multiprocessor for mobile ad hoc networks
Jungeblut T, Grünewald M, Porrmann M, Rückert U (2008)
Advances in Radio Science 6: 239-243.
PUB | PDF | DOI
 
[110]
2008 | Conference Paper | PUB-ID: 2493939
Resource Efficiency of Instruction Set Extensions for Elliptic Curve Cryptography
Puttmann C, Shokrollahi J, Porrmann M (2008)
In: Proceedings of the 5th Internation Conference on Information Technology: New Generations, ITNG 2008. 131-136.
PUB | DOI
 
[109]
2008 | Conference Paper | PUB-ID: 2493957
Run-time Reconfigurable Multiprocessors
Purnaprajna M, Porrmann M (2008)
In: Proceedings of the 22nd International Parallel and Distributed Processing Symposium (IPDPS 2008), PhD Forum.
PUB
 
[108]
2008 | Conference Paper | PUB-ID: 2494157
Run-time Reconfigurable Cluster of Processors
Purnaprajna M, Porrmann M (2008)
In: Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society.
PUB
 
[107]
2008 | Conference Paper | PUB-ID: 2493960
vMAGIC – VHDL Manipulation and Automation for Reliable System Development
Pohl C, Paiz C, Porrmann M (2008)
In: Proceedings of the 3rd International Workshop on Reconfigurable Computing Education (on CD).
PUB
 
[106]
2008 | Conference Paper | PUB-ID: 2494491
A Hardware-in-the-Loop Design Environment for FPGAs
Pohl C, Paiz C, Porrmann M (2008)
In: Design, Automation and Test in Europe (DATE), University Booth.
PUB
 
[105]
2008 | Conference Paper | PUB-ID: 2493900
Ultra-Fast Adaptive Digital Polarization Control in a Realtime Coherent Polarization-Multiplexed QPSK Receiver
Pfau T, Wördehoff C, Peveling R, Ibrahim SK, Hoffmann S, Adamczyk O, Bhandare S, Porrmann M, Noe R, Porte H, Achiam Y, et al. (2008)
In: Proceedings of OFC/NFOEC 2008.
PUB
 
[104]
2008 | Conference Paper | PUB-ID: 2494096
32-krad/s Polarization and 3-dB PDL Tracking in a Realtime Digital Coherent Polarization-Multiplexed QPSK Receiver
Pfau T, El-Darawy M, Wördehoff C, Peveling R, Hoffmann S, Koch B, Adamczyk O, Porrmann M, Noe R (2008)
In: Proceedings of the 2008 IEEE-LEOS Summer Topical Meetings. 105-106.
PUB | DOI
 
[103]
2008 | Book Chapter | PUB-ID: 2493607
Hardware-in-the-Loop Simulations for FPGA-Based Digital Control Design.
Paiz C, Pohl C, Porrmann M (2008)
In: Informatics in Control, Automation and Robotics. Andrade-Cetto J, Ferrier J-L, dias Pereira J'e MC, Filipe J (Eds); , 3. Springer-Verlag: 355-372.
PUB | DOI
 
[102]
2008 | Conference Paper | PUB-ID: 2494113
Realtime digital polarization and carrier recovery in a polarization-multiplexed optical QPSK transmission
Noe R, Hoffmann S, Pfau T, Adamczyk O, Herath V, Peveling R, Porrmann M (2008)
In: Proceedings of the 2008 IEEE/LEOS Summer Topical Meetings. 99-100.
PUB | DOI
 
[101]
2008 | Conference Paper | PUB-ID: 2493890
FPGA-in-the-Loop Simulations with CAMEL-View
Münch E, Gambuzza A, Paiz C, Pohl C, Porrmann M (2008)
In: Self-optimizing Mechatronic Systems: Design the Future, 7th International Heinz Nixdorf Symposium. 429-445.
PUB
 
[100]
2008 | Conference Paper | PUB-ID: 2289205
Design Space Exploration for Resource Efficient VLIW-Processors
Jungeblut T, Dreesen R, Porrmann M, Rückert U, Hachmann U (2008)
In: University Booth of the Design, Automation and Test in Europe (DATE) conference.
PUB
 
[99]
2008 | Conference Paper | PUB-ID: 2493966
Frequency Estimation and Compensation for Coherent QPSK Transmission with DFB Lasers
Hoffmann S, Pfau T, Adamczyk O, Wördehoff C, Peveling R, Porrmann M, Noe R (2008)
In: Proc. OSA Topical Meeting Coherent Optical Technologies and Applications (COTA).
PUB | DOI
 
[98]
2008 | Journal Article | PUB-ID: 2493667
Frequency and Phase Estimation for Coherent QPSK Transmission With Unlocked DFB Lasers
Hoffmann S, Bhandare S, Pfau T, Adamczyk O, Wördehoff C, Peveling R, Porrmann M, Noe R (2008)
IEEE Photonics Technology Letters 20(18): 1569-1571.
PUB | DOI | WoS
 
[97]
2008 | Conference Paper | PUB-ID: 2472725
Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures
Hagemeyer J, Koester M, Porrmann M (2008)
In: 1. GI/ITG KuVS Fachgespräch Virtualisierung. Heinz Nixdorf Institut, Universität Paderborn.
PUB
 
[96]
2008 | Conference Paper | PUB-ID: 2493945
SelfS – A Real-Time Protocol for Virtual Ring Topologies
Griese B, Brinkmann A, Porrmann M (2008)
In: Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS '08), on CD.
PUB | DOI
 
[95]
2008 | Conference Paper | PUB-ID: 2494141
Realtime 40 krad/s Polarization Tracking with 6 dB PDL in Digital Synchronous Polarization-Multiplexed QPSK Receiver
El-Darawy M, Pfau T, Wördehoff C, Koch B, Hoffmann S, Peveling R, Porrmann M, Noe R (2008)
In: Proceedings of European Conference on Optical Communication (ECOC).
PUB | DOI
 
[94]
2008 | Journal Article | PUB-ID: 2493648
Fast Adaptive Polarization and PDL Tracking in a Real-Time FPGA-Based Coherent PolDM-QPSK Receiver
El-Darawy M, Pfau T, Hoffmann S, Peveling R, Wördehoff C, Koch B, Porrmann M, Adamczyk O, Noe R (2008)
IEEE Photonics Technology Letters 20(21): 1796-1798.
PUB | DOI | WoS
 
[93]
2008 | Book | PUB-ID: 2493583
Selbstoptimierende Systeme des Maschinenbaus – Definitionen, Anwendungen, Konzepte.
Adelt P, Donoth J, Gausemeier J, Geisler J, Henkler S, Kahl S, Klöpper B, Krupp A, Münch E, Oberthür S, Paiz C, et al. (2008) ; Band 234.
HNI-Verlagsschriftenreihe.
PUB
 
[92]
2007 | Conference Paper | PUB-ID: 2494512
A Layer-Model Based Methodology for the Design of Dynamically Reconfigurable Systems. Invited Talk
Porrmann M (2007)
In: 2nd Int. Conf. on Industrial and Information Systems (ICIIS 2007), Reconfigurable Computing Workshop.
PUB
 
[91]
2007 | Conference Paper | PUB-ID: 2285993
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux
Rana V, Santambrogio M, Sciuto D, Kettelhoit B, Koester M, Porrmann M, Rückert U (2007)
In: Proceedings of the 21st International Parallel and Distributed Processing Symposium (IPDPS 2007) - Reconfigurable Architecture Workshop (RAW), IEEE Computer Society.
PUB | DOI
 
[90]
2007 | Journal Article | PUB-ID: 2145016
Resource efficiency of the GigaNetIC chip multiprocessor architecture
Niemann J-C, Puttmann C, Porrmann M, Rückert U (2007)
Journal of System Architecture 53(5-6): 285-299.
PUB | DOI | WoS
 
[89]
2007 | Conference Paper | PUB-ID: 2494230
PDL-Tolerant Real-time Polarization-Multiplexed QPSK Transmission with Digital Coherent Polarization Diversity Receiver
Pfau T, Peveling R, Hoffmann S, Bhandare S, Ibrahim SK, Sandel D, Adamczyk O, Porrmann M, Noe R, Achiam Y, Schlieder D, et al. (2007)
In: Proceedings of the 2007 IEEE/LEOS Summer Topical Meetings. 17-18.
PUB | DOI
 
[88]
2007 | Conference Paper | PUB-ID: 2472738
Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proc. of the Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA '07). Las Vegas, USA.
PUB
 
[87]
2007 | Conference Paper | PUB-ID: 2472729
Run-Time Reconfiguration of FPGA-Based Drive Controllers
Schulz B, Paiz C, Hagemeyer J, Mathapati S, Porrmann M, Böcker J (2007)
In: European Conference on Power Electronics and Applications (EPE 2007). Aalborg, Denmark.
PUB | DOI
 
[86]
2007 | Conference Paper | PUB-ID: 2286362
GigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors
Puttmann C, Niemann J-C, Porrmann M, Rückert U (2007)
In: Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on. 495-502.
PUB
 
[85]
2007 | Conference Paper | PUB-ID: 2494514
Flexible Hardware Platforms for Dynamic Reconfiguration
Porrmann M (2007)
In: Invited Talk at the 2nd Int. Conf. on Industrial and Information Systems (ICIIS 2007), Reconfigurable Computing Workshop.
PUB
 
[84]
2007 | Conference Paper | PUB-ID: 2494159
Hardware-in-the-Loop Entwicklungsumgebung fuer informationsverarbeitende Komponenten mechatronischer Systeme
Pohl C, Paiz C, Porrmann M (2007)
In: 5. Paderborner Workshop Entwurf mechatronischer Systeme. 69-79.
PUB
 
[83]
2007 | Conference Paper | PUB-ID: 2494262
Realtime Optical Synchronous QPSK Transmission with DFB lasers
Pfau T, Adamczyk O, Herath V, Peveling R, Hoffmann S, Porrmann M, Noe R (2007)
In: Proceedings of the 2007 IEEE/LEOS Summer Topical Meetings. 15-16.
PUB | DOI
 
[82]
2007 | Conference Paper | PUB-ID: 2494285
Polarization-Multiplexed 2.8 Gbit/s Synchronous QPSK Transmission with Real-Time Digital Polarization Tracking
Pfau T, Peveling R, Samson F, Romoth J, Hoffmann S, Bhandare S, Ibrahim SK, Sandel D, Adamczyk O, Porrmann M, Noe R, et al. (2007)
In: Proceedings of ECOC., 3. 263-264.
PUB | DOI
 
[81]
2007 | Journal Article | PUB-ID: 2493699
Coherent Digital Polarization Diversity Receiver for Real-Time Polarization-Multiplexed QPSK Transmission at 2.8 Gb/s
Pfau T, Peveling R, Hauden Y, Grossard N, Porte H, Achiam Y, Hoffmann S, Ibrahim SK, Adamczyk O, Bhandare S, Sandel D, et al. (2007)
Photonics Technology Letters, IEEE 19(24): 1988-1990.
PUB | DOI | WoS
 
[80]
2007 | Conference Paper | PUB-ID: 2494198
The Utilization of Reconfigurable Hardware to Implement Digital Controllers: a Review
Paiz C, Porrmann M (2007)
In: Proceedings of the IEEE International Symposium on Industrial Electronics. 2380-2385.
PUB | DOI
 
[79]
2007 | Conference Paper | PUB-ID: 2494165
A design framework for FPGA-based dynamically reconfigurable digital controllers
Paiz C, Kettelhoit B, Porrmann M (2007)
In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS2007). 3709-3711.
PUB | DOI
 
[78]
2007 | Conference Paper | PUB-ID: 2494202
Real-time Digital Carrier & Data Recovery for a Synchronous Optical Quadrature Phase Shift Keying Transmission System
Noe R, Pfau T, Adamczyk O, Peveling R, Herath V, Hoffmann S, Porrmann M, Ibrahim SK, Bhandare S (2007)
In: Proceedings of System Microwave Symposium. IEEE/MTT-S International. 1503-1506.
PUB | DOI
 
[77]
2007 | Conference Paper | PUB-ID: 2289049
A Multiprocessor Cache for Massively Parallel SoC Architectures
Niemann J-C, Liß C, Porrmann M, Rückert U (2007)
In: ARCS'07: Architecture of Computing Systems. Zurich, Switzerland: 83-97.
PUB | DOI
 
[76]
2007 | Journal Article | PUB-ID: 2285724
Defragmentation Algorithms for Partially Reconfigurable Hardware
Köster M, Kalte H, Porrmann M, Rückert U (2007)
VLSI-SoC: From Systems to Silicon 240: 41-53.
PUB | DOI
 
[75]
2007 | Conference Paper | PUB-ID: 2289057
Real-Time Multiprocessor SoC for Mobile Ad Hoc Networks
Jungeblut T, Grünewald M, Porrmann M, Rückert U (2007)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth, 2007.
PUB
 
[74]
2007 | Conference Paper | PUB-ID: 2289033
Compiler-Driven Reconfiguration of Multiprocessors
Hussmann M, Thies M, Kastens U, Purnaprajna M, Porrmann M, Rückert U (2007)
In: Proceedings of the Workshop on Application Specific Processors (WASP) 2007.
PUB | PDF
 
[73]
2007 | Conference Paper | PUB-ID: 2472748
INDRA – Integrated Design Flow for Reconfigurable Architectures
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth.
PUB
 
[72]
2007 | Conference Paper | PUB-ID: 2472743
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). Amsterdam, Netherlands: 331-338.
PUB | DOI
 
[71]
2006 | Conference Paper | PUB-ID: 2494405
Dynamically Reconfigurable Hardware for Autonomous Mini-Robots
Paiz C, Chinapirom T, Witkowski U, Porrmann M (2006)
In: 32nd Annual Conference of the IEEE Industrial Electronics Society (IECON-2006). 3981-3986.
PUB | DOI
 
[70]
2006 | Conference Paper | PUB-ID: 2286278
Bio-inspired massively parallel architectures for nanotechnologies
Jäger B, Porrmann M, Rückert U (2006)
In: Proceeding of the IEEE International Symposium on Circuits and Systems (ISCAS 2006). 1961-1964.
PUB | DOI
 
[69]
2006 | Conference Paper | PUB-ID: 2494380
Application-driven Development of Concurrent Packet Processing Platforms
Sauer C, Gries M, Niemann J-C, Porrmann M, Thies M (2006)
In: Proceedings of the 5th International Symposium on Parallel Computing in Electrical Engineering. 55-61.
PUB
 
[68]
2006 | Conference Paper | PUB-ID: 2288969
A Lightweight NoC for the NOVA Packet Processing Plattform
Sauer C, Gries M, Dirk S, Niemann J-C, Porrmann M, Rückert U (2006)
In: Design, Automation and Test in Europe DATE, Future Interconnect and Network-on-Chip (NoC) Workshop. Munich, Germany.
PUB | PDF
 
[67]
2006 | Book Chapter | PUB-ID: 2285718
Implementation of Self-Organizing Feature Maps in Reconfigurable Hardware
Porrmann M, Witkowski U, Rückert U (2006)
In: FPGA Implementations of Neural Networks. Omondi A, Rajapakse J (Eds); Springer-Verlag: 247-269.
PUB
 
[66]
2006 | Conference Paper | PUB-ID: 2494321
Teaching Reconfigurable Computing Theory and Practice
Porrmann M, Niemann J-C (2006)
In: International Workshop on Reconfigurable Computing Education (on CD).
PUB
 
[65]
2006 | Journal Article | PUB-ID: 2493754
Synchronous QPSK transmission at 1.6 Gbit/s with standard DFB lasers and real-time digital receiver
Pfau T, Hoffmann S, Peveling R, Ibrahim SK, Adamczyk O, Porrmann M, Bhandare S, Noe R, Achiam Y (2006)
IEEE Electronic Letters 42(20): 1175-1176.
PUB | DOI | WoS
 
[64]
2006 | Journal Article | PUB-ID: 2493726
First Real-Time Data Recovery for SynchroneusQPSK Transmission with Standard DFB Lasers
Pfau T, Hoffmann S, Peveling R, Bhandare S, Ibrahim SK, Adamczyk O, Porrmann M, Noe R, Achiam Y (2006)
IEEE PHOTONICS TECHNOLOGY LETTERS 18(18): 1907-1909.
PUB | DOI | WoS
 
[63]
2006 | Conference Paper | PUB-ID: 2494390
1.6 Gbit/s Real-Time Synchronous QPSK Transmission with Standard DFB Lasers
Pfau T, Hoffmann S, Peveling R, Bhandare S, Adamczyk O, Porrmann M, Noe R, Achiam Y (2006)
In: Proceedings of the 32nd European Conference on Optical Communication (ECOC 2006).
PUB | DOI
 
[62]
2006 | Conference Paper | PUB-ID: 2494368
Reconfigurable Hardware in-the-Loop Simulations for Digital Control Design
Paiz C, Pohl C, Porrmann M (2006)
In: 3th International Conference on Informatics in Control, Automation and Robotics (ICINCO). 39-46.
PUB
 
[61]
2006 | Conference Paper | PUB-ID: 2288961
GigaNetIC – A Scalable Embedded On-Chip Multiprocessor Architecture for Network Applications
Niemann J-C, Puttmann C, Porrmann M, Rückert U (2006)
In: ARCS'06 Architecture of Computing Systems. 268-282.
PUB | DOI
 
[60]
2006 | Patent | PUB-ID: 2494093
Flexible Beschleunigungseinheit für die Verarbeitung von Datenpaketen
Niemann J-C, Sauer C, Porrmann M, Rückert U (2006) .
PUB
 
[59]
2006 | Conference Paper | PUB-ID: 2494340
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems
Koester M, Kalte H, Porrmann M (2006)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '06). CSREA Press: 70-76.
PUB
 
[58]
2006 | Conference Paper | PUB-ID: 2494364
A Layer Model for Systematically Designing Dynamically Reconfigurable Systems
Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 16th International Conference on Field Programmable Logic and Applications. 547-552.
PUB | DOI
 
[57]
2006 | Conference Paper | PUB-ID: 2494326
REPLICA2Pro: Task Relocation by Bitstream Manipulation in VIRTEX-II/Pro FPGAs
Kalte H, Porrmann M (2006)
In: Proceedings of the 3rd Conference on Computing Frontiers. 403-412.
PUB
 
[56]
2006 | Conference Paper | PUB-ID: 2494346
Synchrone 1,6-Gbits-QPSK-Datenübertragung in Echtzeit mit DFB-Lasern
Hoffmann S, Pfau T, Peveling R, Bhandare S, Adamczyk O, Porrmann M, Noe R (2006)
In: Workshop der ITG Fachgruppe 5.3.1, Modellierung photonischer Komponenten und Systeme. 21-27.
PUB
 
[55]
2006 | Conference Paper | PUB-ID: 2494328
Hardware-Efficient and Phase Noise Tolerant Digital Synchronous QPSK Receiver Concept
Hoffmann S, Pfau T, Adamczyk O, Peveling R, Porrmann M, Noe R (2006)
In: Coherent Optical Technologies and Applications (COTA 2006), on CD.
PUB
 
[54]
2006 | Conference Paper | PUB-ID: 2473942
Dedicated Module Access in Dynamically Reconfigurable Systems
Hagemeyer J, Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS).
PUB | DOI
 
[53]
2006 | Conference Paper | PUB-ID: 2494374
Evaluation of on-chip interfaces for dynamically reconfigurable coprocessors
Griese B, Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 5th International Symposium on Parallel Computing in Electrical Engineering. 214-219.
PUB | DOI
 
[52]
2006 | Conference Paper | PUB-ID: 2494360
A Reconfigurable Ethernet Switch for Self-Optimizing Communication Systems
Griese B, Porrmann M (2006)
In: Proceedings of the IFIP Conference on Biologically Inspired Cooperative Computing (BICC 2006). 115-125.
PUB | DOI
 
[51]
2005 | Conference Paper | PUB-ID: 2288853
An Evaluation of the Scalable GigaNetIC Architecture for Access Networks
Niemann J-C, Porrmann M, Sauer C, Rückert U (2005)
In: Advanced Networking and Communications Hardware Workshop (ANCHOR), held in conjunction with the 32nd Annual International Symposium on Computer Architecture (ISCA 2005).
PUB | PDF
 
[50]
2005 | Conference Paper | PUB-ID: 2288944
Dynamically reconfigurable hardware for digital controllers in mechatronic systems
Paiz C, Kettelhoit B, Klassen A, Porrmann M, Rückert U (2005)
In: IEEE International Conference on Mechatronics (ICM 2005). 675-680.
PUB | DOI
 
[49]
2005 | Conference Paper | PUB-ID: 2286119
REPLICA: A Bitstream Manipulation Filter for Module Relocation in Partial Reconfigurable Systems
Kalte H, Lee G, Porrmann M, Rückert U (2005)
In: Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, on CD.
PUB | DOI
 
[48]
2005 | Conference Paper | PUB-ID: 2286309
A scalable parallel SoC architecture for network processors
Niemann J-G, Porrmann M, Rückert U (2005)
In: VLSI, 2005. Proceedings. IEEE Computer Society Annual Symposium on. 311-313.
PUB | DOI
 
[47]
2005 | Conference Paper | PUB-ID: 2288910
Technologieplanung in der Mikroelektronik – von Moore's Law zur Nanotechnologie-Roadmap
Liß C, Peveling R, Porrmann M, Rückert U (2005)
In: Symposium fuer Vorausschau und Technologieplanung. Berlin, Germany: 87-103.
PUB
 
[46]
2005 | Conference Paper | PUB-ID: 2494437
Task Placement for Heterogeneous Reconfigurable Architectures
Koester M, Kalte H, Porrmann M (2005)
In: Proceedings of the IEEE 2005 Conference on Field-Programmable Technology (FPT '05). 43-50.
PUB | DOI
 
[45]
2005 | Conference Paper | PUB-ID: 2288829
Dynamically Reconfigurable Hardware for Self-Optimizing Mechatronic Systems
Kettelhoit B, Kalte H, Porrmann M, Rückert U (2005)
In: 5. GMM/ITG/GI-Workshop Multi-Nature Systems. 97-101.
PUB
 
[44]
2005 | Journal Article | PUB-ID: 2285654
A System Approach for Partially Reconfigurable Architectures
Kalte H, Kettelhoit B, Koester M, Porrmann M, Rückert U (2005)
International Journal of Embedded Systems (IJES), Inderscience Publisher 1(3/4): 274-290.
PUB | DOI
 
[43]
2005 | Conference Paper | PUB-ID: 2494429
Run-Time Defragmentation for Partially Reconfigurable Systems
Koester M, Kalte H, Porrmann M (2005)
In: Proceedings of the International Conference on Very Large Scale Integration (IFIP VLSI-SOC). 109-115.
PUB
 
[42]
2005 | Conference Paper | PUB-ID: 2286050
Placement-Oriented Modeling of Partially Reconfigurable Architectures
Koester M, Porrmann M, Rückert U (2005)
In: Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, on CD.
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[41]
2005 | Conference Paper | PUB-ID: 2288900
Rekonfigurierbare Hardware zur Regelung mechatronischer Systeme
Kettelhoit B, Klassen A, Paiz C, Porrmann M, Rückert U (2005)
In: 3. Paderborner Workshop: Intelligente mechatronische Systeme. 195-205.
PUB
 
[40]
2005 | Conference Paper | PUB-ID: 2494424
Context Saving and Restoring for Multitasking in Reconfigurable Systems
Kalte H, Porrmann M (2005)
In: 15th International Conference on Field Programmable Logic and Applications. 223-228.
PUB | DOI
 
[39]
2005 | Conference Paper | PUB-ID: 2494412
Component case study of a self-optimizing RCOS/RTOS system: A reconfigurable network service
Griese B, Oberthür S, Porrmann M (2005)
In: From Specification to Embedded Systems Application, International Embedded Systems Symposium (IESS). Rettberg A, Zanella MC, Rammig FJ (Eds); 267-277.
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[38]
2005 | Conference Paper | PUB-ID: 2288882
Adaptable Switch boxes as on-chip routing nodes for networks-on-chip
Eickhoff R, Niemann J-C, Porrmann M, Rückert U (2005)
In: From Specification to Embedded Systems Application, International Embedded Systems Symposium (IESS). Rettberg A, Zanella MC, Rammig FJ (Eds); Manaus, Brazil: 201-210.
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[37]
2005 | Book Chapter | PUB-ID: 2145286
A framework for design space exploration of resource efficient network processing on multiprocessor SoCs
Grünewald M, Niemann J-C, Porrmann M, Rückert U (2005)
In: Network Processor Design: Issues and Practices. Crowely P, Franklin MA, Hadimioglu H, Onufryk PZ (Eds); , 3. Morgan Kaufmann Publisher: 245-277.
PUB | DOI
 
[36]
2004 | Conference Paper | PUB-ID: 2288776
Parallele Architekturen für Netzwerkprozessoren
Niemann J-C, Porrmann M, Rückert U (2004)
In: Ambient Intelligence, VDE Kongress., 1. VDE Verlag: 105-110.
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[35]
2004 | Conference Paper | PUB-ID: 2285942
Hardware Accelerated Data Analysis
Franzmeier M, Pohl C, Porrmann M, Rückert U (2004)
In: Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. 309-314.
PUB | DOI
 
[34]
2004 | Conference Paper | PUB-ID: 2286146
Network application driven instruction set extensions for embedded processing clusters
Grunewald M, Le DK, Kastens U, Niemann J-C, Porrmann M, Rückert U, Slowik A, Thies M (2004)
In: Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. 209-214.
PUB | DOI
 
[33]
2004 | Conference Paper | PUB-ID: 2285912
Dynamic Reconfiguration of Real-Time Network Interfaces
Vonnahme E, Griese G, Porrmann M, Rückert U (2004)
In: Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. 376-379.
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[32]
2004 | Conference Paper | PUB-ID: 2286101
A mapping strategy for resource-efficient network processing on multiprocessor SoCs
Grunewald M, Niemann J-C, Porrmann M, Rückert U (2004)
In: Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings., 2. 758-763.
PUB | DOI
 
[31]
2004 | Conference Paper | PUB-ID: 2286233
Study on column wise design compaction for reconfigurable systems
Kalte H, Lee G, Porrmann M, Rückert U (2004)
In: Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on. 413-416.
PUB | DOI
 
[30]
2004 | Conference Paper | PUB-ID: 2286138
gNBX - reconfigurable hardware acceleration of self-organizing maps
Pohl C, Franzmeier M, Porrmann M, Rückert U (2004)
In: Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on. 97-104.
PUB | DOI
 
[29]
2004 | Conference Paper | PUB-ID: 2288760
Dynamische Rekonfiguration echtzeitfähiger Netzwerkschnittstellen
Vonnahme E, Griese B, Porrmann M, Rückert U (2004)
In: VDE Kongress 2004 – ITG Fachtagung 'Ambient Intelligence'.(Band 1). Berlin, Germany: VDE Verlag: 99-104.
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[28]
2004 | Conference Paper | PUB-ID: 2288730
A Comparative Study on System Approaches for Partially Reconfigurable Architectures
Kalte H, Koester M, Kettelhoit B, Porrmann M, Rückert U (2004)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '04). Plaks T (Ed); Las Vegas, Nevada, USA: CSREA Press: 70-76.
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[27]
2004 | Conference Paper | PUB-ID: 2288708
Leistungsbewertung unterschiedlicher Einbettungsvarianten dynamisch rekonfigurierbarer Hardware
Kalte H, Porrmann M, Rückert U (2004)
In: ARCS 2004 – Organic and Pervasive Computing. 234-244.
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[26]
2004 | Conference Paper | PUB-ID: 2286356
System-on-programmable-chip approach enabling online fine-grained 1D-placement
Kalte H, Porrmann M, Rückert U (2004)
In: Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International. 141.
PUB | DOI
 
[25]
2004 | Conference Paper | PUB-ID: 2288700
A framework for design space exploration of resource efficient network processing on multiprocessor SoCs
Grünewald M, Niemann J-C, Porrmann M, Rückert U (2004)
In: Proceedings of the 3rd Workshop on Network Processors & Applications. Madrid, Spain: 87-101.
PUB
 
[24]
2004 | Conference Paper | PUB-ID: 2288742
Hardware Support for Dynamic Reconfiguration in Reconfigurable SoC Architectures
Griese B, Vonnahme E, Porrmann M, Rückert U (2004)
In: Proceedings of the 14th International Conference on Field Programmable Logic and its Applications (FPL2004). Antwerp, Belgium: 842-846.
PUB | DOI
 
[23]
2004 | Conference Paper | PUB-ID: 2494463
Developing an IP-DSLAM Benchmark for Network Processor Units
Hagen G, Niemann J-C, Porrmann M, Sauer C, Slowik A, Thies M (2004)
In: ANCHOR 2004, Advanced Networking and Communications Hardware Workshop, held in conjunction with the 31st Annual International Symposium on Computer Architecture (ISCA 2004).
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[22]
2003 | Conference Paper | PUB-ID: 2286024
A holistic methodology for network processor design
Bonorden O, Bruls N, Kastens U, Le DK, Heide auf der FM, Niemann J-C, Porrmann M, Rückert U, Slowik A, Thies M (2003)
In: Local Computer Networks, 2003. LCN '03. Proceedings. 28th Annual IEEE International Conference on. 583-592.
PUB | DOI
 
[21]
2003 | Journal Article | PUB-ID: 2145324
A Massively Parallel Architecture for Self-Organizing Feature Maps
Porrmann M, Witkowski U, Rückert U (2003)
IEEE Transactions on Neural Networks, Special Issue on Hardware Implementations 14(5): 1110-1121.
PUB | DOI | WoS | PubMed | Europe PMC
 
[20]
2002 | Conference Paper | PUB-ID: 2285966
On-chip interconnects for next generation system-on-chips
Brinkmann A, Niemann J-C, Hehemann I, Langen D, Porrmann M, Rückert U (2002)
In: ASIC/SOC Conference, 2002. 15th Annual IEEE International. 211-215.
PUB | DOI
 
[19]
2002 | Conference Paper | PUB-ID: 2288603
A Reconfigurable SOM Hardware Accelerator
Porrmann M, Franzmeier M, Kalte H, Witkowski U, Rückert U (2002) .
PUB | PDF
 
[18]
2002 | Conference Paper | PUB-ID: 2288565
Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation
Langen D, Niemann J-C, Porrmann M, Kalte H, Rückert U (2002)
In: Proceedings of the IEEE-Workshop: Heterogeneous reconfigurable Systems on Chip (SoC). Hamburg, Germany.
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[17]
2002 | Book | PUB-ID: 2493620
Leistungsbewertung eingebetteter Neurocomputersysteme. Dissertation.
Porrmann M (2002) ; 104.
Paderborn: HNI-Verlagsschriftenreihe, Heinz Nixdorf Institut, Schaltungstechnik.
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[16]
2002 | Conference Paper | PUB-ID: 2285896
Implementation of artificial neural networks on a reconfigurable hardware accelerator
Porrmann M, Witkowski U, Kalte H, Rückert U (2002)
In: Parallel, Distributed and Network-based Processing, 2002. Proceedings. 10th Euromicro Workshop on. 243-250.
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[15]
2002 | Conference Paper | PUB-ID: 2288589
Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations
Porrmann M, Witkowski U, Kalte H, Rückert U (2002)
In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Montpellier, France: 1048-1057.
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[14]
2002 | Conference Paper | PUB-ID: 2288575
A Prototyping Platform for Dynamically Reconfigurable System on Chip Designs
Kalte H, Porrmann M, Rückert U (2002)
In: Proceedings of the IEEE Workshop Heterogeneous reconfigurable Systems on Chip (SoC). Hamburg, Germany.
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[13]
2001 | Conference Paper | PUB-ID: 2288555
Extension Module for Application-Specific Hardware on the Minirobot Khepera
Niemann J-C, Witkowski U, Porrmann M, Rückert U (2001)
In: Autonomous Minirobots for Research and Edutainment (AMiRE 2001). Paderborn, Germany: 279-288.
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[12]
2001 | Conference Paper | PUB-ID: 2288526
XipChip – A Multiprocessor CPU for Multifunction Peripherals
Porrmann M, Rückert U, Landmann J, Marks KM (2001)
In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI)., 15. Orlando, Florida, USA: 512-517.
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[11]
2001 | Conference Paper | PUB-ID: 2288549
The Impact of Communication on Hardware Accelerators for Neural Networks
Porrmann M, Rüping S, Rückert U (2001)
In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI)., 3. Orlando, Florida, USA: 248-253.
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[10]
2001 | Conference Paper | PUB-ID: 2288539
A Dynamically Reconfigurable Hardware Accelerator for Self-Organizing Feature Maps
Porrmann M, Kalte H, Witkowski U, Niemann J-C, Rückert U (2001)
In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics, SCI 2001., 3. Orlando, Florida, USA: 242-247.
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[9]
2000 | Conference Paper | PUB-ID: 2286572
Using a Dynamically Reconfigurable System to Accelerate Octree Based 3D Graphics
Kalte H, Porrmann M, Rückert U (2000)
In: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA´2000)., 5. Monte Carlo Resort, Las Vegas, Nevada, USA: 2819-2824.
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[8]
2000 | Conference Paper | PUB-ID: 2286566
Rapid Prototyping System für dynamisch rekonfigurierbare Hardwarestrukturen
Kalte H, Porrmann M, Rückert U (2000)
In: Workshop: Architekturentwurf und Entwicklung eingebetteter Systeme (AES2000). Karlsruhe, Germany: 149-157.
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[7]
1999 | Conference Paper | PUB-ID: 2286315
SOM hardware with acceleration module for graphical representation of the learning process
Porrmann M, Ruping S, Rückert U (1999)
In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. 380-386.
PUB | DOI
 
[6]
1998 | Journal Article | PUB-ID: 2285592
SOM Accelerator System
Rüping S, Porrmann M, Rückert U (1998)
Neurocomputing 21: 31-50.
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[5]
1998 | Conference Paper | PUB-ID: 2286468
A Hybrid Knowledge Processing System
Porrmann M, Heittmann A, Rüping S, Rückert U (1998)
In: Proceedings of the Conference Neural Networks and their Applications (NEURAP). Marseille, France: 177-184.
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[4]
1997 | Conference Paper | PUB-ID: 2286241
HIBRIC-MEM, a Memory Controller for PowerPC Based Systems
Porrmann M, Landmann J, Marks KM, Rückert U (1997)
In: Proceedings of the 23rd EUROMICRO Conference. Budapest, Ungarn: 653-663.
PUB | DOI
 
[3]
1997 | Conference Paper | PUB-ID: 2286402
SOM Hardware-Accelerator
Rüping S, Porrmann M, Rückert U (1997)
In: Workshop on Self-Organizing Maps (WSOM).(1997). Espoo, Finnland: 136-141.
PUB | PDF
 
[2]
1997 | Conference Paper | PUB-ID: 2286384
A High Performance SOFM Hardware-System
Rüping S, Porrmann M, Rückert U (1997)
In: Proceedings of the International Work-Conference on Artificial and Natural Neural Networks (IWANN´97). Lanzarote, Spain: 772-781.
PUB | PDF
 
[1]
1996 | Conference Paper | PUB-ID: 2285575
Neuronale Assoziativspeicher
Palm G, Rückert U, Porrmann M, Schwenker F (1996)
In: Neuroinformatik Statusseminar. 419-432.
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[202]
2017 | Report | PUB-ID: 2913643 PUB | PDF | DOI
 
[201]
2017 | Journal Article | PUB-ID: 2909430
FPGA-based Multi-Robot Tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2017)
Journal of Parallel and Distributed Computing 107: 146-161.
PUB | DOI
 
[200]
2017 | Journal Article | PUB-ID: 2912818
M2DC – Modular Microserver DataCentre with heterogeneous hardware
Oleksiak A, Kierzynka M, Piatek W, Agosta G, Barenghi A, Porrmann M, Hagemeyer J, Griessl R, Lachmair J, Peykanu M, Tigges L, et al. (2017)
Microprocessors and Microsystems 52: 117-130.
PUB | DOI
 
[199]
2017 | Conference Paper | PUB-ID: 2909044
From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining
Lachmair J, Mieth T, Griessl R, Hagemeyer J, Porrmann M (2017)
In: International Joint Conference on Neural Networks (IJCNN 2017). 4299-4308.
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[198]
2017 | Conference Paper | PUB-ID: 2912816
Comparing synchronous, mesochronous and asynchronous NoCs for GALS based MPSoC
Ax J, Kucza N, Vohrmann M, Jungeblut T, Porrmann M, Rückert U (Accepted)
In: IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17).
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[197]
2017 | Conference Paper | PUB-ID: 2912815
Reconfigurable Vision Processing System for Player Tracking in Indoor Sports
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (Accepted)
In: Conference on Design and Architectures for Signal and Image Processing (DASIP 2017).
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[196]
2017 | Conference Paper | PUB-ID: 2909584
M2DC: Modular Microserver Datacentre with Heterogeneous Hardware
Oleksiak A, Kierzynka M, Piatek W, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, et al. (2017)
Presented at the Energy-efficient Servers for Cloud and Edge Computing 2017 Workshop (ENeSCE 2017) - co-located with HiPEAC 2017, Stockholm, Sweden.
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[195]
2017 | Book Chapter | PUB-ID: 2908972
The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio
Sievers G, Hübener B, Ax J, Flasskamp M, Kelly W, Jungeblut T, Porrmann M (2017)
In: Computing Platforms for Software-Defined Radio. Hussain W, Nurmi J, Isoaho J, Garzia F (Eds); Cham, Switzerland: Springer International Publishing: 29--59.
PUB | DOI
 
[194]
2016 | Conference Abstract | PUB-ID: 2909602
FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers
Griessl R, Peykanu M, Tigges L, Hagemeyer J, Porrmann M (2016)
Presented at the Workshop "Reconfigurable Computing — From Embedded Systems to Reconfigurable Hyperscale Servers" co-located with the International Conference on Field-Programmable Logic and Applications (FPL 2016), Lausanne, Switzerland.
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[193]
2016 | Journal Article | PUB-ID: 2908973
OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems
Cozzi D, Korf S, Cassano L, Hagemeyer J, Domenici A, Bernardeschi C, Porrmann M, Sterpone L (2016)
IEEE Transactions on Emerging Topics in Computing PP(99): 1-1.
PUB | DOI
 
[192]
2016 | Conference Paper | PUB-ID: 2900363
Performance Estimation of Streaming Applications for Hierarchical MPSoCs
Flasskamp M, Sievers G, Ax J, Klarhorst C, Jungeblut T, Kelly W, Thies M, Porrmann M (2016)
In: Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO). ACM Press.
PUB | PDF | DOI
 
[191]
2016 | Conference Paper | PUB-ID: 2908974
Data centres for IoT applications: The M2DC approach (Invited paper)
Oleksiak A, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, Christmann W, vor dem Berge M, Krupop S, Cudennec L, Cecowski M, et al. (2016)
In: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS). 293-299.
PUB | DOI
 
[190]
2016 | Conference Paper | PUB-ID: 2908980
The M2DC Project: Modular Microserver DataCentre
Cecowski M, Agosta G, Oleksiak A, Kierzynka M, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, et al. (2016)
In: 2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers (IEEE).
PUB | DOI
 
[189]
2015 | Conference Paper | PUB-ID: 2783142
System-Level Analysis of Network Interfaces for Hierarchical MPSoCs
Ax J, Sievers G, Flasskamp M, Kelly W, Jungeblut T, Porrmann M (2015)
In: Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc). New York, NY, USA: ACM: 3-8.
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[188]
2015 | Conference Paper | PUB-ID: 2732427
Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI
Sievers G, Ax J, Kucza N, Flasskamp M, Jungeblut T, Kelly W, Porrmann M, Rückert U (2015)
In: 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE: 1925-1928.
PUB | DOI
 
[187]
2015 | Conference Paper | PUB-ID: 2760622
Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI
Sievers G, Daberkow J, Ax J, Flasskamp M, Kelly W, Jungeblut T, Porrmann M, Rückert U (2015)
In: International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC). IEEE: 175-181.
PUB | DOI
 
[186]
2015 | Conference Paper | PUB-ID: 2732419
Automatische Protokollanpassung von Echtzeit-Ethernet-Standards durch FPGA-Technologien
Buda A, Walter M, Hartfiel J, Ax J, Nussbaum K, Jungeblut T, Porrmann M (2015)
Presented at the Automation 2015, Baden-Baden.
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[185]
2015 | Conference Paper | PUB-ID: 2902039
FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, vor dem Berge M, Kosmann L, Knocke P, Kierzynka M, Oleksiak A (2015)
Presented at the First International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC‘15), held in conjunction with Supercomputing 2015, Austin Texas, USA.
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[184]
2015 | Conference Paper | PUB-ID: 2902041
A 65 nm Standard Cell Library for Ultra Low-power Applications
Vohrmann M, Chatterjee S, Lütkemeier S, Jungeblut T, Porrmann M, Rückert U (2015)
Presented at the 22nd European Conference on Circuit Theory and Design, ECCTD2015, Trondheim, Norway.
PUB | DOI
 
[183]
2015 | Conference Paper | PUB-ID: 2901108
FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-8.
PUB | DOI
 
[182]
2015 | Conference Paper | PUB-ID: 2901107
A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-6.
PUB | DOI
 
[181]
2015 | Conference Paper | PUB-ID: 2732431
Datenflussmodellierung als Methode zur Optimierung von Entwicklungsprozessen am Beispiel der Leiterplattenentwicklung
Herbrechtsmeier S, Jungeblut T, Porrmann M (2015)
In: Entwurf mechatronischer Systeme., 343. Paderborn: HNI Verlagsschriftenreihe.
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[180]
2014 | Conference Paper | PUB-ID: 2681323
Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications
Sabena D, Sterpone L, Schölzel M, Koal T, Vierhaus HT, Wong S, Glein R, Rittner F, Stender C, Porrmann M, Hagemeyer J (2014)
In: Proceedings of 19th IEEE European Test Symposium (ETS). 175-182.
PUB | DOI
 
[179]
2014 | Conference Paper | PUB-ID: 2698930
A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, Vor dem Berge M, Kiesel T, Christmann W (2014)
In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014. IEEE: 146-153.
PUB | DOI
 
[178]
2014 | Conference Paper | PUB-ID: 2698992
FPGA-based Generic Architecture for Rapid Prototyping of Video Hardware Accelerators using NoC AXI4-Stream Interconnect and GigE Vision Camera Interfaces
Irwansyah A, Ibraheem OW, Klimeck D, Porrmann M, Rückert U (2014)
Presented at the Bildverarbeitung in der Automation (BVAu) 2014, Lemgo, Germany.
PUB
 
[177]
2014 | Conference Paper | PUB-ID: 2698994
Dynamische Rekonfiguration von Echtzeit-Ethernet-Standards mit harten Echtzeit­anforderungen
Walter M, Ax J, Buda A, Nussbaum K, Hartfiel J, Jungeblut T, Porrmann M (2014)
Presented at the Kommunikation in der Automation – KommA 2014, Lemgo, Germany.
PUB
 
[176]
2014 | Conference Paper | PUB-ID: 2698999
Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems
Sorrenti D, Cozzi D, Korf S, Cassano L, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the 17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Amsterdam, The Netherlands.
PUB | DOI
 
[175]
2014 | Conference Paper | PUB-ID: 2681362
An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems
Cassano L, Cozzi D, Jungewelter D, Korf S, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the DTIS 2014, 9th International conference on Design & Technology of Integrated Systems in Nanoscale Era, Santorini , Greece.
PUB | DOI
 
[174]
2014 | Conference Paper | PUB-ID: 2699005
AXI-based SpaceFibre IP CORE Implementation
Cozzi D, Jungewelter D, Kleibrink D, Korf S, Hagemeyer J, Porrmann M, Ilstad J (2014)
Presented at the 6th International SpaceWire Conference, Athens, Greece.
PUB | DOI
 
[173]
2014 | Conference Paper | PUB-ID: 2698929
CoreVA: A Configurable Resource-efficient VLIW Processor Architecture
Hübener B, Sievers G, Jungeblut T, Porrmann M, Rückert U (2014)
In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing. IEEE: 9-16.
PUB | DOI
 
[172]
2014 | Book Chapter | PUB-ID: 2732400
Development of Self-Optimizing Systems
Gausemeier J, Korf S, Porrmann M, Stahl K, Sudmann O, Vaßholz M (2014)
In: Design Methodology for Intelligent Technical Systems – Develop Intelligent Technical Systems of the Future. Gausemeier J, Rammig FJ, Schäfer W (Eds); Berlin Heidelberg: Springer Verlag: 65-117.
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[171]
2014 | Book Chapter | PUB-ID: 2732260
Methods of Improving the Dependability of Self-optimizing Systems
Seifried A, Trächtler A, Kleinjohann B, Korf S, Porrmann M, Heinzemann C, Rasche C, Sondermann-Woelke C, Priesterjahn C, Steenken D, Rammig F-J, et al. (2014)
In: Dependability of Self-Optimizing Mechatronic Systems. Gausemeier J, Rammig FJ, Schäfer W, Sextro W (Eds); Lecture Notes in Mechanical Engineering. Berlin Heidelberg: Springer Verlag: 37-171.
PUB | DOI
 
[170]
2013 | Journal Article | PUB-ID: 2575531
A reconfigurable neuroprocessor for self-organizing feature maps
Lachmair J, Merényi E, Porrmann M, Rückert U (2013)
Neurocomputing 112(SI): 189-199.
PUB | DOI | WoS
 
[169]
2013 | Conference Paper | PUB-ID: 2634649
Pareto-optimal Signal Processing on Low-Power Microprocessors
Christ P, Sievers G, Einhaus J, Jungeblut T, Porrmann M, Rückert U (2013)
In: Proceedings of the 12th IEEE International Conference on SENSORS. 1843-1846.
PUB | DOI
 
[168]
2013 | Conference Paper | PUB-ID: 2681289
Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience
Desogus M, Sterpone L, Porrmann M, Hagemeyer J, Illstad J (2013)
In: RADECS proceedings., 2. IEEE / Institute of Electrical and Electronics Engineers: 13-16.
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[167]
2013 | Conference Paper | PUB-ID: 2681304
Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture
Sterpone L, Sabena D, Ullah A, Porrmann M, Hagemeyer J, Ilstad J (2013)
In: Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on. 184-188.
PUB | DOI
 
[166]
2013 | Journal Article | PUB-ID: 2622226
A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing
Sterpone L, Porrmann M, Hagemeyer J (2013)
IEEE Transactions on Computers 62(8): 1508-1525.
PUB | DOI | WoS
 
[165]
2013 | Conference Paper | PUB-ID: 2576115
Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme
Korf S, Sievers G, Ax J, Cozzi D, Jungeblut T, Hagemeyer J, Porrmann M, Rückert U (2013)
In: Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme. HNI-Verlagsschriftenreihe. 79-90.
PUB | PDF
 
[164]
2013 | Conference Paper | PUB-ID: 2637667
Design-Space Exploration of the Configurable 32 bit VLIW Processor CoreVA for Signal Processing Applications
Sievers G, Christ P, Einhaus J, Jungeblut T, Porrmann M, Rückert U (2013)
In: 2013 NORCHIP.
PUB | DOI
 
[163]
2013 | Journal Article | PUB-ID: 2634614
A Systematic Approach for Optimized Bypass Configurations for Application-specific Embedded Processors
Jungeblut T, Hübener B, Porrmann M, Rückert U (2013)
ACM Trans. Embed. Comput. Syst. 13(2): 1-25.
PUB | DOI | WoS
 
[162]
2013 | Conference Paper | PUB-ID: 2576042
On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems
Cassano L, Cozzi D, Korf S, Hagemeyer J, Porrmann M, Sterpone L (2013)
In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013. Piscataway, NJ: IEEE: 717-720.
PUB | DOI
 
[161]
2013 | Journal Article | PUB-ID: 2560236
A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control
Lütkemeier S, Jungeblut T, Berge HKO, Aunet S, Porrmann M, Rückert U (2013)
IEEE Journal Of Solid-State Circuits 48(1): 8-19.
PUB | DOI | WoS
 
[160]
2012 | Conference Paper | PUB-ID: 2493814
Mini-Robot's Performance Optimization via Online Reconfiguration and HW/SW Task Scheduling.
Durelli G, Santambrogio MD, Cresci F, Porrmann M, Sciuto D (2012)
In: 19th Reconfigurable Architectures Workshop (RAW 2012).
PUB | DOI
 
[159]
2012 | Conference Paper | PUB-ID: 2559365
Optimizing inter-FPGA communication by automatic channel adaptation
Romoth J, Jungewelter D, Hagemeyer J, Porrmann M, Rückert U (2012)
In: Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on. 1-7.
PUB | DOI
 
[158]
2012 | Conference Paper | PUB-ID: 2493813
A TCMS-based architecture for GALS NoCs.
Jungeblut T, Ax J, Porrmann M, Rückert U (2012)
In: 2012 IEEE International Symposium on Circuits and Systems.
PUB | DOI
 
[157]
2012 | Conference Paper | PUB-ID: 2493811
gNBXe - a Reconfigurable Neuroprocessor for Various Types of Self-Organizing Maps
Lachmair J, Merenyi E, Porrmann M, Rückert U (2012)
In: European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning. 645-650.
PUB
 
[156]
2012 | Conference Paper | PUB-ID: 2517354
A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing
Hagemeyer J, Hilgenstein A, Jungewelter D, Cozzi D, Felicetti C, Rückert U, Korf S, Köster M, Margaglia F, Porrmann M, Dittmann F, et al. (2012)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems., (AHS-2012). 9-16.
PUB
 
[155]
2012 | Conference Paper | PUB-ID: 2475063
A 200mV 32b Subthreshold Processor with Adaptive Supply Voltage Control
Lütkemeier S, Jungeblut T, Porrmann M, Rückert U (2012)
In: Proc. of the International Solid-State Circuits Conference (ISSCC). 484-485.
PUB | DOI
 
[154]
2011 | Conference Abstract | PUB-ID: 2494497
Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications
Köster M, Hagemeyer J, Margaglia F, Porrmann M, Dittmann F, Ditze M, Sterpone L, Harris J, Ilstad J (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[153]
2011 | Conference Paper | PUB-ID: 2476993
Resource Efficiency of Scalable Processor Architectures for SDR-based Applications (Invited)
Jungeblut T, Ax J, Sievers G, Hübener B, Porrmann M, Rückert U (2011)
In: Proc. of the Radar, Communication and Measurement Conference (RADCOM).
PUB | Files available
 
[152]
2011 | Conference Paper | PUB-ID: 2493819
Analysis of SEU Effects in Partially Reconfigurable SoPCs.
Sterpone L, Margaglia F, Köster M, Hagemeyer J, Porrmann M (2011)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011). 129-136.
PUB | DOI
 
[151]
2011 | Conference Paper | PUB-ID: 2494507
Fast Design-space Exploration with FPGA Cluster
Romoth J, Hagemeyer J, Porrmann M, Rückert U (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[150]
2011 | Journal Article | PUB-ID: 2493623
Applying dynamic reconfiguration in the mobile robotics domain: a case study on computer vision algorithms.
Nava F, Sciuto D, Santambrogio MD, Herbrechtsmeier S, Porrmann M, Witkowski U, Rückert U (2011)
ACM Transactions on Reconfigurable Technology and Systems (TRETS) 4(3): 1-22.
PUB | DOI | WoS
 
[149]
2011 | Book Chapter | PUB-ID: 2018536
Design-space Exploration for Flexible WLAN Hardware
Jungeblut T, Liß C, Porrmann M, Rückert U (2011)
In: Cross Layer Designs in WLAN Systems. Zorba N, Skianis C, Verikoukis C (Eds); Leicester, UK: Troubador Publishing: 521-564.
PUB
 
[148]
2011 | Conference Paper | PUB-ID: 2494510
A Low-Power Vision Processing Platform for Mobile Robots
Griessl R, Herbrechtsmeier S, Porrmann M, Rückert U (2011)
In: Proceedings of the FPL2011 Workshop on Computer Vision on Low-Power Reconfigurable Architectures.
PUB
 
[147]
2011 | Conference Paper | PUB-ID: 2493823
Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.
Grawinkel M, Schäfers T, Brinkmann A, Hagemeyer J, Porrmann M (2011)
In: MASCOTS2011 The 19th Annual Meeting of the IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems. 297-306.
PUB | DOI
 
[146]
2011 | Conference Paper | PUB-ID: 2286173
Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs
Korf S, Cozzi D, Koester M, Hagemeyer J, Porrmann M, Rückert U, Santambrogio MD (2011)
In: Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on. 125-132.
PUB
 
[145]
2010 | Conference Paper | PUB-ID: 2472693
RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing
Porrmann M, Hagemeyer J, Pohl C, Romoth J, Strugholtz M (2010)
In: Parallel Computing: From Multicores and GPU's to Petascale, Advances in Parallel Computing., 19. IOS press: 592-599.
PUB | PDF
 
[144]
2010 | Conference Paper | PUB-ID: 2493826
Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.
Dittmann F, Linke M, Hagemeyer J, Köster M, Lallet J, Pohl C, Porrmann M, Harris J, Ilstad J (2010)
In: Proceedings of the International SpaceWire Conference 2010. 193-196.
PUB
 
[143]
2010 | Conference Paper | PUB-ID: 2018564
High Level Specification of Embedded Listeners for Monitoring of Network-on-Chips
Puttmann C, Porrmann M, Grassi PR, Santambrogio MD, Rückert U (2010)
In: Proceedings of the IEEE International Symposium on Circuits and Systems. 3333-3336.
PUB | DOI
 
[142]
2010 | Journal Article | PUB-ID: 2145423
Design Optimizations for Tiled Partially Reconfigurable Systems
Koester M, Luk W, Hagemeyer J, Porrmann M, Rückert U (2010)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19(6): 1048-1061.
PUB | DOI | WoS
 
[141]
2010 | Journal Article | PUB-ID: 2018557
Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis
Purnaprajna M, Porrmann M, Rückert U, Hussmann M, Thies M, Kastens U (2010)
ACM Transactions on Reconfigurable Technology 3(3): 1-25.
PUB | DOI | WoS
 
[140]
2010 | Conference Paper | PUB-ID: 2018549
Design Space Exploration for Memory Subsystems of VLIW Architectures
Jungeblut T, Sievers G, Porrmann M, Rückert U (2010)
In: 5th IEEE International Conference on Networking, Architecture, and Storage. 377-385.
PUB | DOI
 
[139]
2010 | Patent | PUB-ID: 2494087
Mehrprozessor-Computersystem
Christmann W, Strugholtz M, Hagemeyer J, Porrmann M (2010) .
PUB
 
[138]
2010 | Conference Paper | PUB-ID: 2286616
A Framework for the Design Space Exploration of Software-Defined Radio Applications
Jungeblut T, Dreesen R, Porrmann M, Thies M, Rückert U, Kastens U (2010) .
PUB
 
[137]
2010 | Conference Paper | PUB-ID: 2286628
A modular design flow for very large design space explorations
Jungeblut T, Lütkemeier S, Sievers G, Porrmann M, Rückert U (2010) .
PUB | Files available
 
[136]
2010 | Journal Article | PUB-ID: 2018541
Resource Efficiency of Hardware Extensions of a 4-issue VLIW Processor for Elliptic Curve Cryptography
Jungeblut T, Puttmann C, Dreesen R, Porrmann M, Thies M, Rückert U, Kastens U (2010)
Advances in Radio Science 8: 295-305.
PUB | PDF | DOI
 
[135]
2010 | Conference Paper | PUB-ID: 2286622
Extending GigaNoC towards a Dependable Network-on-Chip
Puttmann C, Porrmann M, Rückert U (2010)
In: Digest of the DAC Workshop on Diagnostic Services in Network-on-Chips (DSNOC).
PUB
 
[134]
2010 | Journal Article | PUB-ID: 2494479
vMAGIC – Automatic Code Generation for VHDL
Pohl C, Fuest R, Porrmann M (2010)
newsletter edacentrum 2009: 1-9.
PUB | DOI
 
[133]
2009 | Conference Paper | PUB-ID: 2144891
FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications
Paiz C, Pohl C, Radkowski R, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia: 372-375.
PUB | DOI
 
[132]
2009 | Conference Paper | PUB-ID: 2144752
Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing
Purnaprajna M, Pohl C, Porrmann M, Rückert U (2009)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'09, July 13-16, 2009, Las Vegas, Nevada, USA. 119-125.
PUB | PDF
 
[131]
2009 | Journal Article | PUB-ID: 2144870
Run-time reconfigurability in embedded multiprocessors
Purnaprajna M, Porrmann M, Rückert U (2009)
ACM SIGARCH Computer Architecture News 37(2): 30-37.
PUB | DOI
 
[130]
2009 | Conference Paper | PUB-ID: 2493880
Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance
Porrmann M, Purnaprajna M, Puttmann C (2009)
In: NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). 467-473.
PUB | DOI
 
[129]
2009 | Conference Paper | PUB-ID: 2472678
Rapid Prototyping of Next-Generation Multiprocessor SoCs
Porrmann M, Hagemeyer J, Romoth J, Strugholtz M (2009)
In: Proceedings of Semiconductor Conference Dresden, SCD 2009. Dresden, Germany.
PUB
 
[128]
2009 | Conference Paper | PUB-ID: 2144880
Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks
Pohl C, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Sydney, Australia: 368-371.
PUB | DOI
 
[127]
2009 | Journal Article | PUB-ID: 2493628
vMAGIC - Automatic Code Generation for VHDL
Pohl C, Paiz C, Porrmann M (2009)
International Journal of Reconfigurable Computing, Hindawi Publishing Corporation, 2009(Article ID 205149): 1-9.
PUB | DOI
 
[126]
2009 | Conference Paper | PUB-ID: 2494485
Manageable Dynamic Reconfiguration with EVE – Extendable VHDL Editor
Pohl C, Fuest R, Porrmann M (2009)
In: Design Automation and Test in Europe (DATE), University Booth.
PUB
 
[125]
2009 | Conference Paper | PUB-ID: 2493855
Towards Real-Time Implementation of Coherent Optical Communication
Pfau T, Peveling R, Herath V, Hoffmann S, Wördehoff C, Adamczyk O, Porrmann M, Noe R (2009)
In: Proceedings of OFC/NFOEC 2009.
PUB | DOI
 
[124]
2009 | Conference Paper | PUB-ID: 2144843
FPGA-Based Realization of Self-Optimizing Drive-Controllers
Paiz C, Hagemeyer J, Pohl C, Porrmann M, Rückert U, Schulz B, Peters W, Böcker J (2009)
In: the 35th Annual Conference of the IEEE Industrial Electronics Society (IECON 2009). 2868-2873.
PUB | PDF | DOI
 
[123]
2009 | Conference Paper | PUB-ID: 2144772
InCyte ChipEstimator in Research and Education
Liß C, Porrmann M, Rückert U (2009)
In: CDNLive EMEA 2009.
PUB
 
[122]
2009 | Conference Paper | PUB-ID: 2144782
Early Exploration of Network Processor Architectures Using Cadence InCyte Chip Estimator
Liß C, Porrmann M, Rückert U (2009)
In: CDNLive EMEA 2009.
PUB
 
[121]
2009 | Conference Paper | PUB-ID: 2472673
Design Optimizations to Improve Placeability of Partial Reconfiguration Modules
Koester M, Luk W, Hagemeyer J, Porrmann M (2009)
In: Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009). ACM Press.
PUB | DOI
 
[120]
2009 | Conference Paper | PUB-ID: 2144830
Design Space Exploration for Next Generation Wireless Technologies (invited talk).
Jungeblut T, Klassen D, Dreesen R, Porrmann M, Thies M, Rückert U, Kastens U (2009)
In: Proc. of the Electrical and Electronic Engineering for Communication Conference (EEEfCOM) 2009.
PUB
 
[119]
2009 | Conference Paper | PUB-ID: 2493834
Cipset for a Coherent Polarization-Multiplexed QPSK Receiver
Herath V, Peveling R, Pfau T, Adamczyk O, Hoffmann S, Wördehoff C, Porrmann M, Noe R (2009)
In: Proceedings of OFC/NFOEC 2009.
PUB | DOI
 
[118]
2009 | Conference Paper | PUB-ID: 2472686
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems
Grassi PR, Santambrogio M, Hagemeyer J, Pohl C, Porrmann M (2009)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '09). Las Vegas, USA: 174-180.
PUB
 
[117]
2009 | Conference Paper | PUB-ID: 2144724
Reconfiguration Viewer
Grassi PR, Pohl C, Porrmann M (2009)
In: Design Automation and Test in Europe, DATE University Booth. Nice, France.
PUB | PDF
 
[116]
2009 | Conference Paper | PUB-ID: 2493870
A High Level Methodology for Monitoring Network-on-Chips
Grassi PR, Santambrogio M, Puttmann C, Pohl C, Porrmann M (2009)
In: Diagnostic Services in Network-on-Chips (DSNOC 2009), Workshop at Design, Automation and Test in Europe.
PUB
 
[115]
2009 | Conference Paper | PUB-ID: 2144757
A Synchronization Method for Register Traces of Pipelined Processors
Dreesen R, Jungeblut T, Thies M, Porrmann M, Rückert U, Kastens U (2009)
In: Proceedings of the International Embedded Systems Symposium 2009 (IESS '09). Schloss Langenargen, Germany: 207-217.
PUB
 
[114]
2008 | Conference Paper | PUB-ID: 2493929
Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography
Purnaprajna M, Puttmann C, Porrmann M (2008)
In: Proceedings of DATE '08: Design, Automation and Test in Europe. 1462-1467.
PUB | DOI
 
[113]
2008 | Journal Article | PUB-ID: 2493684
Coherent optical communication: Towards realtime systems at 40 Gbit/s and beyond
Pfau T, Hoffmann S, Adamczyk O, Peveling R, Herath V, Porrmann M, Noe R (2008)
Optics Express 16(2): 866-872.
PUB | DOI | WoS | PubMed | Europe PMC
 
[112]
2008 | Journal Article | PUB-ID: 2289175
Hardware Accelerators for Elliptic Curve Cryptography
Puttmann C, Shokrollahi J, Porrmann M, Rückert U (2008)
Advances in Radio Science 6: 259-264.
PUB | PDF | DOI
 
[111]
2008 | Journal Article | PUB-ID: 2289237
Realtime multiprocessor for mobile ad hoc networks
Jungeblut T, Grünewald M, Porrmann M, Rückert U (2008)
Advances in Radio Science 6: 239-243.
PUB | PDF | DOI
 
[110]
2008 | Conference Paper | PUB-ID: 2493939
Resource Efficiency of Instruction Set Extensions for Elliptic Curve Cryptography
Puttmann C, Shokrollahi J, Porrmann M (2008)
In: Proceedings of the 5th Internation Conference on Information Technology: New Generations, ITNG 2008. 131-136.
PUB | DOI
 
[109]
2008 | Conference Paper | PUB-ID: 2493957
Run-time Reconfigurable Multiprocessors
Purnaprajna M, Porrmann M (2008)
In: Proceedings of the 22nd International Parallel and Distributed Processing Symposium (IPDPS 2008), PhD Forum.
PUB
 
[108]
2008 | Conference Paper | PUB-ID: 2494157
Run-time Reconfigurable Cluster of Processors
Purnaprajna M, Porrmann M (2008)
In: Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society.
PUB
 
[107]
2008 | Conference Paper | PUB-ID: 2493960
vMAGIC – VHDL Manipulation and Automation for Reliable System Development
Pohl C, Paiz C, Porrmann M (2008)
In: Proceedings of the 3rd International Workshop on Reconfigurable Computing Education (on CD).
PUB
 
[106]
2008 | Conference Paper | PUB-ID: 2494491
A Hardware-in-the-Loop Design Environment for FPGAs
Pohl C, Paiz C, Porrmann M (2008)
In: Design, Automation and Test in Europe (DATE), University Booth.
PUB
 
[105]
2008 | Conference Paper | PUB-ID: 2493900
Ultra-Fast Adaptive Digital Polarization Control in a Realtime Coherent Polarization-Multiplexed QPSK Receiver
Pfau T, Wördehoff C, Peveling R, Ibrahim SK, Hoffmann S, Adamczyk O, Bhandare S, Porrmann M, Noe R, Porte H, Achiam Y, et al. (2008)
In: Proceedings of OFC/NFOEC 2008.
PUB
 
[104]
2008 | Conference Paper | PUB-ID: 2494096
32-krad/s Polarization and 3-dB PDL Tracking in a Realtime Digital Coherent Polarization-Multiplexed QPSK Receiver
Pfau T, El-Darawy M, Wördehoff C, Peveling R, Hoffmann S, Koch B, Adamczyk O, Porrmann M, Noe R (2008)
In: Proceedings of the 2008 IEEE-LEOS Summer Topical Meetings. 105-106.
PUB | DOI
 
[103]
2008 | Book Chapter | PUB-ID: 2493607
Hardware-in-the-Loop Simulations for FPGA-Based Digital Control Design.
Paiz C, Pohl C, Porrmann M (2008)
In: Informatics in Control, Automation and Robotics. Andrade-Cetto J, Ferrier J-L, dias Pereira J'e MC, Filipe J (Eds); , 3. Springer-Verlag: 355-372.
PUB | DOI
 
[102]
2008 | Conference Paper | PUB-ID: 2494113
Realtime digital polarization and carrier recovery in a polarization-multiplexed optical QPSK transmission
Noe R, Hoffmann S, Pfau T, Adamczyk O, Herath V, Peveling R, Porrmann M (2008)
In: Proceedings of the 2008 IEEE/LEOS Summer Topical Meetings. 99-100.
PUB | DOI
 
[101]
2008 | Conference Paper | PUB-ID: 2493890
FPGA-in-the-Loop Simulations with CAMEL-View
Münch E, Gambuzza A, Paiz C, Pohl C, Porrmann M (2008)
In: Self-optimizing Mechatronic Systems: Design the Future, 7th International Heinz Nixdorf Symposium. 429-445.
PUB
 
[100]
2008 | Conference Paper | PUB-ID: 2289205
Design Space Exploration for Resource Efficient VLIW-Processors
Jungeblut T, Dreesen R, Porrmann M, Rückert U, Hachmann U (2008)
In: University Booth of the Design, Automation and Test in Europe (DATE) conference.
PUB
 
[99]
2008 | Conference Paper | PUB-ID: 2493966
Frequency Estimation and Compensation for Coherent QPSK Transmission with DFB Lasers
Hoffmann S, Pfau T, Adamczyk O, Wördehoff C, Peveling R, Porrmann M, Noe R (2008)
In: Proc. OSA Topical Meeting Coherent Optical Technologies and Applications (COTA).
PUB | DOI
 
[98]
2008 | Journal Article | PUB-ID: 2493667
Frequency and Phase Estimation for Coherent QPSK Transmission With Unlocked DFB Lasers
Hoffmann S, Bhandare S, Pfau T, Adamczyk O, Wördehoff C, Peveling R, Porrmann M, Noe R (2008)
IEEE Photonics Technology Letters 20(18): 1569-1571.
PUB | DOI | WoS
 
[97]
2008 | Conference Paper | PUB-ID: 2472725
Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures
Hagemeyer J, Koester M, Porrmann M (2008)
In: 1. GI/ITG KuVS Fachgespräch Virtualisierung. Heinz Nixdorf Institut, Universität Paderborn.
PUB
 
[96]
2008 | Conference Paper | PUB-ID: 2493945
SelfS – A Real-Time Protocol for Virtual Ring Topologies
Griese B, Brinkmann A, Porrmann M (2008)
In: Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS '08), on CD.
PUB | DOI
 
[95]
2008 | Conference Paper | PUB-ID: 2494141
Realtime 40 krad/s Polarization Tracking with 6 dB PDL in Digital Synchronous Polarization-Multiplexed QPSK Receiver
El-Darawy M, Pfau T, Wördehoff C, Koch B, Hoffmann S, Peveling R, Porrmann M, Noe R (2008)
In: Proceedings of European Conference on Optical Communication (ECOC).
PUB | DOI
 
[94]
2008 | Journal Article | PUB-ID: 2493648
Fast Adaptive Polarization and PDL Tracking in a Real-Time FPGA-Based Coherent PolDM-QPSK Receiver
El-Darawy M, Pfau T, Hoffmann S, Peveling R, Wördehoff C, Koch B, Porrmann M, Adamczyk O, Noe R (2008)
IEEE Photonics Technology Letters 20(21): 1796-1798.
PUB | DOI | WoS
 
[93]
2008 | Book | PUB-ID: 2493583
Selbstoptimierende Systeme des Maschinenbaus – Definitionen, Anwendungen, Konzepte.
Adelt P, Donoth J, Gausemeier J, Geisler J, Henkler S, Kahl S, Klöpper B, Krupp A, Münch E, Oberthür S, Paiz C, et al. (2008) ; Band 234.
HNI-Verlagsschriftenreihe.
PUB
 
[92]
2007 | Conference Paper | PUB-ID: 2494512
A Layer-Model Based Methodology for the Design of Dynamically Reconfigurable Systems. Invited Talk
Porrmann M (2007)
In: 2nd Int. Conf. on Industrial and Information Systems (ICIIS 2007), Reconfigurable Computing Workshop.
PUB
 
[91]
2007 | Conference Paper | PUB-ID: 2285993
Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux
Rana V, Santambrogio M, Sciuto D, Kettelhoit B, Koester M, Porrmann M, Rückert U (2007)
In: Proceedings of the 21st International Parallel and Distributed Processing Symposium (IPDPS 2007) - Reconfigurable Architecture Workshop (RAW), IEEE Computer Society.
PUB | DOI
 
[90]
2007 | Journal Article | PUB-ID: 2145016
Resource efficiency of the GigaNetIC chip multiprocessor architecture
Niemann J-C, Puttmann C, Porrmann M, Rückert U (2007)
Journal of System Architecture 53(5-6): 285-299.
PUB | DOI | WoS
 
[89]
2007 | Conference Paper | PUB-ID: 2494230
PDL-Tolerant Real-time Polarization-Multiplexed QPSK Transmission with Digital Coherent Polarization Diversity Receiver
Pfau T, Peveling R, Hoffmann S, Bhandare S, Ibrahim SK, Sandel D, Adamczyk O, Porrmann M, Noe R, Achiam Y, Schlieder D, et al. (2007)
In: Proceedings of the 2007 IEEE/LEOS Summer Topical Meetings. 17-18.
PUB | DOI
 
[88]
2007 | Conference Paper | PUB-ID: 2472738
Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proc. of the Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA '07). Las Vegas, USA.
PUB
 
[87]
2007 | Conference Paper | PUB-ID: 2472729
Run-Time Reconfiguration of FPGA-Based Drive Controllers
Schulz B, Paiz C, Hagemeyer J, Mathapati S, Porrmann M, Böcker J (2007)
In: European Conference on Power Electronics and Applications (EPE 2007). Aalborg, Denmark.
PUB | DOI
 
[86]
2007 | Conference Paper | PUB-ID: 2286362
GigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors
Puttmann C, Niemann J-C, Porrmann M, Rückert U (2007)
In: Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on. 495-502.
PUB
 
[85]
2007 | Conference Paper | PUB-ID: 2494514
Flexible Hardware Platforms for Dynamic Reconfiguration
Porrmann M (2007)
In: Invited Talk at the 2nd Int. Conf. on Industrial and Information Systems (ICIIS 2007), Reconfigurable Computing Workshop.
PUB
 
[84]
2007 | Conference Paper | PUB-ID: 2494159
Hardware-in-the-Loop Entwicklungsumgebung fuer informationsverarbeitende Komponenten mechatronischer Systeme
Pohl C, Paiz C, Porrmann M (2007)
In: 5. Paderborner Workshop Entwurf mechatronischer Systeme. 69-79.
PUB
 
[83]
2007 | Conference Paper | PUB-ID: 2494262
Realtime Optical Synchronous QPSK Transmission with DFB lasers
Pfau T, Adamczyk O, Herath V, Peveling R, Hoffmann S, Porrmann M, Noe R (2007)
In: Proceedings of the 2007 IEEE/LEOS Summer Topical Meetings. 15-16.
PUB | DOI
 
[82]
2007 | Conference Paper | PUB-ID: 2494285
Polarization-Multiplexed 2.8 Gbit/s Synchronous QPSK Transmission with Real-Time Digital Polarization Tracking
Pfau T, Peveling R, Samson F, Romoth J, Hoffmann S, Bhandare S, Ibrahim SK, Sandel D, Adamczyk O, Porrmann M, Noe R, et al. (2007)
In: Proceedings of ECOC., 3. 263-264.
PUB | DOI
 
[81]
2007 | Journal Article | PUB-ID: 2493699
Coherent Digital Polarization Diversity Receiver for Real-Time Polarization-Multiplexed QPSK Transmission at 2.8 Gb/s
Pfau T, Peveling R, Hauden Y, Grossard N, Porte H, Achiam Y, Hoffmann S, Ibrahim SK, Adamczyk O, Bhandare S, Sandel D, et al. (2007)
Photonics Technology Letters, IEEE 19(24): 1988-1990.
PUB | DOI | WoS
 
[80]
2007 | Conference Paper | PUB-ID: 2494198
The Utilization of Reconfigurable Hardware to Implement Digital Controllers: a Review
Paiz C, Porrmann M (2007)
In: Proceedings of the IEEE International Symposium on Industrial Electronics. 2380-2385.
PUB | DOI
 
[79]
2007 | Conference Paper | PUB-ID: 2494165
A design framework for FPGA-based dynamically reconfigurable digital controllers
Paiz C, Kettelhoit B, Porrmann M (2007)
In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS2007). 3709-3711.
PUB | DOI
 
[78]
2007 | Conference Paper | PUB-ID: 2494202
Real-time Digital Carrier & Data Recovery for a Synchronous Optical Quadrature Phase Shift Keying Transmission System
Noe R, Pfau T, Adamczyk O, Peveling R, Herath V, Hoffmann S, Porrmann M, Ibrahim SK, Bhandare S (2007)
In: Proceedings of System Microwave Symposium. IEEE/MTT-S International. 1503-1506.
PUB | DOI
 
[77]
2007 | Conference Paper | PUB-ID: 2289049
A Multiprocessor Cache for Massively Parallel SoC Architectures
Niemann J-C, Liß C, Porrmann M, Rückert U (2007)
In: ARCS'07: Architecture of Computing Systems. Zurich, Switzerland: 83-97.
PUB | DOI
 
[76]
2007 | Journal Article | PUB-ID: 2285724
Defragmentation Algorithms for Partially Reconfigurable Hardware
Köster M, Kalte H, Porrmann M, Rückert U (2007)
VLSI-SoC: From Systems to Silicon 240: 41-53.
PUB | DOI
 
[75]
2007 | Conference Paper | PUB-ID: 2289057
Real-Time Multiprocessor SoC for Mobile Ad Hoc Networks
Jungeblut T, Grünewald M, Porrmann M, Rückert U (2007)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth, 2007.
PUB
 
[74]
2007 | Conference Paper | PUB-ID: 2289033
Compiler-Driven Reconfiguration of Multiprocessors
Hussmann M, Thies M, Kastens U, Purnaprajna M, Porrmann M, Rückert U (2007)
In: Proceedings of the Workshop on Application Specific Processors (WASP) 2007.
PUB | PDF
 
[73]
2007 | Conference Paper | PUB-ID: 2472748
INDRA – Integrated Design Flow for Reconfigurable Architectures
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth.
PUB
 
[72]
2007 | Conference Paper | PUB-ID: 2472743
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). Amsterdam, Netherlands: 331-338.
PUB | DOI
 
[71]
2006 | Conference Paper | PUB-ID: 2494405
Dynamically Reconfigurable Hardware for Autonomous Mini-Robots
Paiz C, Chinapirom T, Witkowski U, Porrmann M (2006)
In: 32nd Annual Conference of the IEEE Industrial Electronics Society (IECON-2006). 3981-3986.
PUB | DOI
 
[70]
2006 | Conference Paper | PUB-ID: 2286278
Bio-inspired massively parallel architectures for nanotechnologies
Jäger B, Porrmann M, Rückert U (2006)
In: Proceeding of the IEEE International Symposium on Circuits and Systems (ISCAS 2006). 1961-1964.
PUB | DOI
 
[69]
2006 | Conference Paper | PUB-ID: 2494380
Application-driven Development of Concurrent Packet Processing Platforms
Sauer C, Gries M, Niemann J-C, Porrmann M, Thies M (2006)
In: Proceedings of the 5th International Symposium on Parallel Computing in Electrical Engineering. 55-61.
PUB
 
[68]
2006 | Conference Paper | PUB-ID: 2288969
A Lightweight NoC for the NOVA Packet Processing Plattform
Sauer C, Gries M, Dirk S, Niemann J-C, Porrmann M, Rückert U (2006)
In: Design, Automation and Test in Europe DATE, Future Interconnect and Network-on-Chip (NoC) Workshop. Munich, Germany.
PUB | PDF
 
[67]
2006 | Book Chapter | PUB-ID: 2285718
Implementation of Self-Organizing Feature Maps in Reconfigurable Hardware
Porrmann M, Witkowski U, Rückert U (2006)
In: FPGA Implementations of Neural Networks. Omondi A, Rajapakse J (Eds); Springer-Verlag: 247-269.
PUB
 
[66]
2006 | Conference Paper | PUB-ID: 2494321
Teaching Reconfigurable Computing Theory and Practice
Porrmann M, Niemann J-C (2006)
In: International Workshop on Reconfigurable Computing Education (on CD).
PUB
 
[65]
2006 | Journal Article | PUB-ID: 2493754
Synchronous QPSK transmission at 1.6 Gbit/s with standard DFB lasers and real-time digital receiver
Pfau T, Hoffmann S, Peveling R, Ibrahim SK, Adamczyk O, Porrmann M, Bhandare S, Noe R, Achiam Y (2006)
IEEE Electronic Letters 42(20): 1175-1176.
PUB | DOI | WoS
 
[64]
2006 | Journal Article | PUB-ID: 2493726
First Real-Time Data Recovery for SynchroneusQPSK Transmission with Standard DFB Lasers
Pfau T, Hoffmann S, Peveling R, Bhandare S, Ibrahim SK, Adamczyk O, Porrmann M, Noe R, Achiam Y (2006)
IEEE PHOTONICS TECHNOLOGY LETTERS 18(18): 1907-1909.
PUB | DOI | WoS
 
[63]
2006 | Conference Paper | PUB-ID: 2494390
1.6 Gbit/s Real-Time Synchronous QPSK Transmission with Standard DFB Lasers
Pfau T, Hoffmann S, Peveling R, Bhandare S, Adamczyk O, Porrmann M, Noe R, Achiam Y (2006)
In: Proceedings of the 32nd European Conference on Optical Communication (ECOC 2006).
PUB | DOI
 
[62]
2006 | Conference Paper | PUB-ID: 2494368
Reconfigurable Hardware in-the-Loop Simulations for Digital Control Design
Paiz C, Pohl C, Porrmann M (2006)
In: 3th International Conference on Informatics in Control, Automation and Robotics (ICINCO). 39-46.
PUB
 
[61]
2006 | Conference Paper | PUB-ID: 2288961
GigaNetIC – A Scalable Embedded On-Chip Multiprocessor Architecture for Network Applications
Niemann J-C, Puttmann C, Porrmann M, Rückert U (2006)
In: ARCS'06 Architecture of Computing Systems. 268-282.
PUB | DOI
 
[60]
2006 | Patent | PUB-ID: 2494093
Flexible Beschleunigungseinheit für die Verarbeitung von Datenpaketen
Niemann J-C, Sauer C, Porrmann M, Rückert U (2006) .
PUB
 
[59]
2006 | Conference Paper | PUB-ID: 2494340
Relocation and Defragmentation for Heterogeneous Reconfigurable Systems
Koester M, Kalte H, Porrmann M (2006)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '06). CSREA Press: 70-76.
PUB
 
[58]
2006 | Conference Paper | PUB-ID: 2494364
A Layer Model for Systematically Designing Dynamically Reconfigurable Systems
Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 16th International Conference on Field Programmable Logic and Applications. 547-552.
PUB | DOI
 
[57]
2006 | Conference Paper | PUB-ID: 2494326
REPLICA2Pro: Task Relocation by Bitstream Manipulation in VIRTEX-II/Pro FPGAs
Kalte H, Porrmann M (2006)
In: Proceedings of the 3rd Conference on Computing Frontiers. 403-412.
PUB
 
[56]
2006 | Conference Paper | PUB-ID: 2494346
Synchrone 1,6-Gbits-QPSK-Datenübertragung in Echtzeit mit DFB-Lasern
Hoffmann S, Pfau T, Peveling R, Bhandare S, Adamczyk O, Porrmann M, Noe R (2006)
In: Workshop der ITG Fachgruppe 5.3.1, Modellierung photonischer Komponenten und Systeme. 21-27.
PUB
 
[55]
2006 | Conference Paper | PUB-ID: 2494328
Hardware-Efficient and Phase Noise Tolerant Digital Synchronous QPSK Receiver Concept
Hoffmann S, Pfau T, Adamczyk O, Peveling R, Porrmann M, Noe R (2006)
In: Coherent Optical Technologies and Applications (COTA 2006), on CD.
PUB
 
[54]
2006 | Conference Paper | PUB-ID: 2473942
Dedicated Module Access in Dynamically Reconfigurable Systems
Hagemeyer J, Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS).
PUB | DOI
 
[53]
2006 | Conference Paper | PUB-ID: 2494374
Evaluation of on-chip interfaces for dynamically reconfigurable coprocessors
Griese B, Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 5th International Symposium on Parallel Computing in Electrical Engineering. 214-219.
PUB | DOI
 
[52]
2006 | Conference Paper | PUB-ID: 2494360
A Reconfigurable Ethernet Switch for Self-Optimizing Communication Systems
Griese B, Porrmann M (2006)
In: Proceedings of the IFIP Conference on Biologically Inspired Cooperative Computing (BICC 2006). 115-125.
PUB | DOI
 
[51]
2005 | Conference Paper | PUB-ID: 2288853
An Evaluation of the Scalable GigaNetIC Architecture for Access Networks
Niemann J-C, Porrmann M, Sauer C, Rückert U (2005)
In: Advanced Networking and Communications Hardware Workshop (ANCHOR), held in conjunction with the 32nd Annual International Symposium on Computer Architecture (ISCA 2005).
PUB | PDF
 
[50]
2005 | Conference Paper | PUB-ID: 2288944
Dynamically reconfigurable hardware for digital controllers in mechatronic systems
Paiz C, Kettelhoit B, Klassen A, Porrmann M, Rückert U (2005)
In: IEEE International Conference on Mechatronics (ICM 2005). 675-680.
PUB | DOI
 
[49]
2005 | Conference Paper | PUB-ID: 2286119
REPLICA: A Bitstream Manipulation Filter for Module Relocation in Partial Reconfigurable Systems
Kalte H, Lee G, Porrmann M, Rückert U (2005)
In: Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, on CD.
PUB | DOI
 
[48]
2005 | Conference Paper | PUB-ID: 2286309
A scalable parallel SoC architecture for network processors
Niemann J-G, Porrmann M, Rückert U (2005)
In: VLSI, 2005. Proceedings. IEEE Computer Society Annual Symposium on. 311-313.
PUB | DOI
 
[47]
2005 | Conference Paper | PUB-ID: 2288910
Technologieplanung in der Mikroelektronik – von Moore's Law zur Nanotechnologie-Roadmap
Liß C, Peveling R, Porrmann M, Rückert U (2005)
In: Symposium fuer Vorausschau und Technologieplanung. Berlin, Germany: 87-103.
PUB
 
[46]
2005 | Conference Paper | PUB-ID: 2494437
Task Placement for Heterogeneous Reconfigurable Architectures
Koester M, Kalte H, Porrmann M (2005)
In: Proceedings of the IEEE 2005 Conference on Field-Programmable Technology (FPT '05). 43-50.
PUB | DOI
 
[45]
2005 | Conference Paper | PUB-ID: 2288829
Dynamically Reconfigurable Hardware for Self-Optimizing Mechatronic Systems
Kettelhoit B, Kalte H, Porrmann M, Rückert U (2005)
In: 5. GMM/ITG/GI-Workshop Multi-Nature Systems. 97-101.
PUB
 
[44]
2005 | Journal Article | PUB-ID: 2285654
A System Approach for Partially Reconfigurable Architectures
Kalte H, Kettelhoit B, Koester M, Porrmann M, Rückert U (2005)
International Journal of Embedded Systems (IJES), Inderscience Publisher 1(3/4): 274-290.
PUB | DOI
 
[43]
2005 | Conference Paper | PUB-ID: 2494429
Run-Time Defragmentation for Partially Reconfigurable Systems
Koester M, Kalte H, Porrmann M (2005)
In: Proceedings of the International Conference on Very Large Scale Integration (IFIP VLSI-SOC). 109-115.
PUB
 
[42]
2005 | Conference Paper | PUB-ID: 2286050
Placement-Oriented Modeling of Partially Reconfigurable Architectures
Koester M, Porrmann M, Rückert U (2005)
In: Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, on CD.
PUB
 
[41]
2005 | Conference Paper | PUB-ID: 2288900
Rekonfigurierbare Hardware zur Regelung mechatronischer Systeme
Kettelhoit B, Klassen A, Paiz C, Porrmann M, Rückert U (2005)
In: 3. Paderborner Workshop: Intelligente mechatronische Systeme. 195-205.
PUB
 
[40]
2005 | Conference Paper | PUB-ID: 2494424
Context Saving and Restoring for Multitasking in Reconfigurable Systems
Kalte H, Porrmann M (2005)
In: 15th International Conference on Field Programmable Logic and Applications. 223-228.
PUB | DOI
 
[39]
2005 | Conference Paper | PUB-ID: 2494412
Component case study of a self-optimizing RCOS/RTOS system: A reconfigurable network service
Griese B, Oberthür S, Porrmann M (2005)
In: From Specification to Embedded Systems Application, International Embedded Systems Symposium (IESS). Rettberg A, Zanella MC, Rammig FJ (Eds); 267-277.
PUB
 
[38]
2005 | Conference Paper | PUB-ID: 2288882
Adaptable Switch boxes as on-chip routing nodes for networks-on-chip
Eickhoff R, Niemann J-C, Porrmann M, Rückert U (2005)
In: From Specification to Embedded Systems Application, International Embedded Systems Symposium (IESS). Rettberg A, Zanella MC, Rammig FJ (Eds); Manaus, Brazil: 201-210.
PUB | PDF
 
[37]
2005 | Book Chapter | PUB-ID: 2145286
A framework for design space exploration of resource efficient network processing on multiprocessor SoCs
Grünewald M, Niemann J-C, Porrmann M, Rückert U (2005)
In: Network Processor Design: Issues and Practices. Crowely P, Franklin MA, Hadimioglu H, Onufryk PZ (Eds); , 3. Morgan Kaufmann Publisher: 245-277.
PUB | DOI
 
[36]
2004 | Conference Paper | PUB-ID: 2288776
Parallele Architekturen für Netzwerkprozessoren
Niemann J-C, Porrmann M, Rückert U (2004)
In: Ambient Intelligence, VDE Kongress., 1. VDE Verlag: 105-110.
PUB
 
[35]
2004 | Conference Paper | PUB-ID: 2285942
Hardware Accelerated Data Analysis
Franzmeier M, Pohl C, Porrmann M, Rückert U (2004)
In: Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. 309-314.
PUB | DOI
 
[34]
2004 | Conference Paper | PUB-ID: 2286146
Network application driven instruction set extensions for embedded processing clusters
Grunewald M, Le DK, Kastens U, Niemann J-C, Porrmann M, Rückert U, Slowik A, Thies M (2004)
In: Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. 209-214.
PUB | DOI
 
[33]
2004 | Conference Paper | PUB-ID: 2285912
Dynamic Reconfiguration of Real-Time Network Interfaces
Vonnahme E, Griese G, Porrmann M, Rückert U (2004)
In: Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. 376-379.
PUB | DOI
 
[32]
2004 | Conference Paper | PUB-ID: 2286101
A mapping strategy for resource-efficient network processing on multiprocessor SoCs
Grunewald M, Niemann J-C, Porrmann M, Rückert U (2004)
In: Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings., 2. 758-763.
PUB | DOI
 
[31]
2004 | Conference Paper | PUB-ID: 2286233
Study on column wise design compaction for reconfigurable systems
Kalte H, Lee G, Porrmann M, Rückert U (2004)
In: Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on. 413-416.
PUB | DOI
 
[30]
2004 | Conference Paper | PUB-ID: 2286138
gNBX - reconfigurable hardware acceleration of self-organizing maps
Pohl C, Franzmeier M, Porrmann M, Rückert U (2004)
In: Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on. 97-104.
PUB | DOI
 
[29]
2004 | Conference Paper | PUB-ID: 2288760
Dynamische Rekonfiguration echtzeitfähiger Netzwerkschnittstellen
Vonnahme E, Griese B, Porrmann M, Rückert U (2004)
In: VDE Kongress 2004 – ITG Fachtagung 'Ambient Intelligence'.(Band 1). Berlin, Germany: VDE Verlag: 99-104.
PUB
 
[28]
2004 | Conference Paper | PUB-ID: 2288730
A Comparative Study on System Approaches for Partially Reconfigurable Architectures
Kalte H, Koester M, Kettelhoit B, Porrmann M, Rückert U (2004)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '04). Plaks T (Ed); Las Vegas, Nevada, USA: CSREA Press: 70-76.
PUB
 
[27]
2004 | Conference Paper | PUB-ID: 2288708
Leistungsbewertung unterschiedlicher Einbettungsvarianten dynamisch rekonfigurierbarer Hardware
Kalte H, Porrmann M, Rückert U (2004)
In: ARCS 2004 – Organic and Pervasive Computing. 234-244.
PUB
 
[26]
2004 | Conference Paper | PUB-ID: 2286356
System-on-programmable-chip approach enabling online fine-grained 1D-placement
Kalte H, Porrmann M, Rückert U (2004)
In: Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International. 141.
PUB | DOI
 
[25]
2004 | Conference Paper | PUB-ID: 2288700
A framework for design space exploration of resource efficient network processing on multiprocessor SoCs
Grünewald M, Niemann J-C, Porrmann M, Rückert U (2004)
In: Proceedings of the 3rd Workshop on Network Processors & Applications. Madrid, Spain: 87-101.
PUB
 
[24]
2004 | Conference Paper | PUB-ID: 2288742
Hardware Support for Dynamic Reconfiguration in Reconfigurable SoC Architectures
Griese B, Vonnahme E, Porrmann M, Rückert U (2004)
In: Proceedings of the 14th International Conference on Field Programmable Logic and its Applications (FPL2004). Antwerp, Belgium: 842-846.
PUB | DOI
 
[23]
2004 | Conference Paper | PUB-ID: 2494463
Developing an IP-DSLAM Benchmark for Network Processor Units
Hagen G, Niemann J-C, Porrmann M, Sauer C, Slowik A, Thies M (2004)
In: ANCHOR 2004, Advanced Networking and Communications Hardware Workshop, held in conjunction with the 31st Annual International Symposium on Computer Architecture (ISCA 2004).
PUB
 
[22]
2003 | Conference Paper | PUB-ID: 2286024
A holistic methodology for network processor design
Bonorden O, Bruls N, Kastens U, Le DK, Heide auf der FM, Niemann J-C, Porrmann M, Rückert U, Slowik A, Thies M (2003)
In: Local Computer Networks, 2003. LCN '03. Proceedings. 28th Annual IEEE International Conference on. 583-592.
PUB | DOI
 
[21]
2003 | Journal Article | PUB-ID: 2145324
A Massively Parallel Architecture for Self-Organizing Feature Maps
Porrmann M, Witkowski U, Rückert U (2003)
IEEE Transactions on Neural Networks, Special Issue on Hardware Implementations 14(5): 1110-1121.
PUB | DOI | WoS | PubMed | Europe PMC
 
[20]
2002 | Conference Paper | PUB-ID: 2285966
On-chip interconnects for next generation system-on-chips
Brinkmann A, Niemann J-C, Hehemann I, Langen D, Porrmann M, Rückert U (2002)
In: ASIC/SOC Conference, 2002. 15th Annual IEEE International. 211-215.
PUB | DOI
 
[19]
2002 | Conference Paper | PUB-ID: 2288603
A Reconfigurable SOM Hardware Accelerator
Porrmann M, Franzmeier M, Kalte H, Witkowski U, Rückert U (2002) .
PUB | PDF
 
[18]
2002 | Conference Paper | PUB-ID: 2288565
Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation
Langen D, Niemann J-C, Porrmann M, Kalte H, Rückert U (2002)
In: Proceedings of the IEEE-Workshop: Heterogeneous reconfigurable Systems on Chip (SoC). Hamburg, Germany.
PUB | PDF
 
[17]
2002 | Book | PUB-ID: 2493620
Leistungsbewertung eingebetteter Neurocomputersysteme. Dissertation.
Porrmann M (2002) ; 104.
Paderborn: HNI-Verlagsschriftenreihe, Heinz Nixdorf Institut, Schaltungstechnik.
PUB
 
[16]
2002 | Conference Paper | PUB-ID: 2285896
Implementation of artificial neural networks on a reconfigurable hardware accelerator
Porrmann M, Witkowski U, Kalte H, Rückert U (2002)
In: Parallel, Distributed and Network-based Processing, 2002. Proceedings. 10th Euromicro Workshop on. 243-250.
PUB | DOI
 
[15]
2002 | Conference Paper | PUB-ID: 2288589
Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations
Porrmann M, Witkowski U, Kalte H, Rückert U (2002)
In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Montpellier, France: 1048-1057.
PUB | DOI
 
[14]
2002 | Conference Paper | PUB-ID: 2288575
A Prototyping Platform for Dynamically Reconfigurable System on Chip Designs
Kalte H, Porrmann M, Rückert U (2002)
In: Proceedings of the IEEE Workshop Heterogeneous reconfigurable Systems on Chip (SoC). Hamburg, Germany.
PUB
 
[13]
2001 | Conference Paper | PUB-ID: 2288555
Extension Module for Application-Specific Hardware on the Minirobot Khepera
Niemann J-C, Witkowski U, Porrmann M, Rückert U (2001)
In: Autonomous Minirobots for Research and Edutainment (AMiRE 2001). Paderborn, Germany: 279-288.
PUB | PDF
 
[12]
2001 | Conference Paper | PUB-ID: 2288526
XipChip – A Multiprocessor CPU for Multifunction Peripherals
Porrmann M, Rückert U, Landmann J, Marks KM (2001)
In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI)., 15. Orlando, Florida, USA: 512-517.
PUB
 
[11]
2001 | Conference Paper | PUB-ID: 2288549
The Impact of Communication on Hardware Accelerators for Neural Networks
Porrmann M, Rüping S, Rückert U (2001)
In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI)., 3. Orlando, Florida, USA: 248-253.
PUB
 
[10]
2001 | Conference Paper | PUB-ID: 2288539
A Dynamically Reconfigurable Hardware Accelerator for Self-Organizing Feature Maps
Porrmann M, Kalte H, Witkowski U, Niemann J-C, Rückert U (2001)
In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics, SCI 2001., 3. Orlando, Florida, USA: 242-247.
PUB
 
[9]
2000 | Conference Paper | PUB-ID: 2286572
Using a Dynamically Reconfigurable System to Accelerate Octree Based 3D Graphics
Kalte H, Porrmann M, Rückert U (2000)
In: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA´2000)., 5. Monte Carlo Resort, Las Vegas, Nevada, USA: 2819-2824.
PUB
 
[8]
2000 | Conference Paper | PUB-ID: 2286566
Rapid Prototyping System für dynamisch rekonfigurierbare Hardwarestrukturen
Kalte H, Porrmann M, Rückert U (2000)
In: Workshop: Architekturentwurf und Entwicklung eingebetteter Systeme (AES2000). Karlsruhe, Germany: 149-157.
PUB
 
[7]
1999 | Conference Paper | PUB-ID: 2286315
SOM hardware with acceleration module for graphical representation of the learning process
Porrmann M, Ruping S, Rückert U (1999)
In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. 380-386.
PUB | DOI
 
[6]
1998 | Journal Article | PUB-ID: 2285592
SOM Accelerator System
Rüping S, Porrmann M, Rückert U (1998)
Neurocomputing 21: 31-50.
PUB
 
[5]
1998 | Conference Paper | PUB-ID: 2286468
A Hybrid Knowledge Processing System
Porrmann M, Heittmann A, Rüping S, Rückert U (1998)
In: Proceedings of the Conference Neural Networks and their Applications (NEURAP). Marseille, France: 177-184.
PUB
 
[4]
1997 | Conference Paper | PUB-ID: 2286241
HIBRIC-MEM, a Memory Controller for PowerPC Based Systems
Porrmann M, Landmann J, Marks KM, Rückert U (1997)
In: Proceedings of the 23rd EUROMICRO Conference. Budapest, Ungarn: 653-663.
PUB | DOI
 
[3]
1997 | Conference Paper | PUB-ID: 2286402
SOM Hardware-Accelerator
Rüping S, Porrmann M, Rückert U (1997)
In: Workshop on Self-Organizing Maps (WSOM).(1997). Espoo, Finnland: 136-141.
PUB | PDF
 
[2]
1997 | Conference Paper | PUB-ID: 2286384
A High Performance SOFM Hardware-System
Rüping S, Porrmann M, Rückert U (1997)
In: Proceedings of the International Work-Conference on Artificial and Natural Neural Networks (IWANN´97). Lanzarote, Spain: 772-781.
PUB | PDF
 
[1]
1996 | Conference Paper | PUB-ID: 2285575
Neuronale Assoziativspeicher
Palm G, Rückert U, Porrmann M, Schwenker F (1996)
In: Neuroinformatik Statusseminar. 419-432.
PUB
 

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