SOM hardware with acceleration module for graphical representation of the learning process
Porrmann M, Ruping S, Rückert U (1999)
In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. IEEE Comput. Soc: 380-386.
Konferenzbeitrag
| Veröffentlicht | Englisch
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Abstract / Bemerkung
A digital hardware implementation of self-organizing maps is presented. Dedicated hardware is implemented that allows the on-line visualization of the map during learning. The use of a scalable parallel architecture enables the realization of large scale high performance maps. Fist silicon was produced in a 0.8 mm, 2 metal layer CMOS technology, implementing about 161,800 transistors on a die size of 28.58 mm 2 . Experimental results are presented, that prove the functionality of the design up to a clock frequency of 40 MHz. A classification rate of 250,000 vectors per second and an adaptation rate of 94,000 vectors per second can be guaranteed, independent from the size of the network.
Stichworte
NBX architecture;
neural chips;
self-organising feature maps;
40 MHz;
unsupervised learning;
application specific integrated circuits;
self-organizing maps;
scalable parallel architecture;
online visualization;
two metal layer CMOS technology;
parallel architectures;
learning process;
processor array;
0.8 micron;
large scale high performance maps;
digital hardware implementation;
graphical representation;
SOM hardware;
CMOS digital integrated circuits;
acceleration module
Erscheinungsjahr
1999
Titel des Konferenzbandes
Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on
Seite(n)
380 -386
ISBN
0769500439
Page URI
https://pub.uni-bielefeld.de/record/2286315
Zitieren
Porrmann M, Ruping S, Rückert U. SOM hardware with acceleration module for graphical representation of the learning process. In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. IEEE Comput. Soc; 1999: 380-386.
Porrmann, M., Ruping, S., & Rückert, U. (1999). SOM hardware with acceleration module for graphical representation of the learning process. Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on, 380-386. IEEE Comput. Soc. https://doi.org/10.1109/MN.1999.758890
Porrmann, Mario, Ruping, S., and Rückert, Ulrich. 1999. “SOM hardware with acceleration module for graphical representation of the learning process”. In Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on, 380-386. IEEE Comput. Soc.
Porrmann, M., Ruping, S., and Rückert, U. (1999). “SOM hardware with acceleration module for graphical representation of the learning process” in Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on (IEEE Comput. Soc), 380-386.
Porrmann, M., Ruping, S., & Rückert, U., 1999. SOM hardware with acceleration module for graphical representation of the learning process. In Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. IEEE Comput. Soc, pp. 380-386.
M. Porrmann, S. Ruping, and U. Rückert, “SOM hardware with acceleration module for graphical representation of the learning process”, Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on, IEEE Comput. Soc, 1999, pp.380-386.
Porrmann, M., Ruping, S., Rückert, U.: SOM hardware with acceleration module for graphical representation of the learning process. Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. p. 380-386. IEEE Comput. Soc (1999).
Porrmann, Mario, Ruping, S., and Rückert, Ulrich. “SOM hardware with acceleration module for graphical representation of the learning process”. Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. IEEE Comput. Soc, 1999. 380-386.
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