Run-time Reconfigurable Cluster of Processors
Purnaprajna M, Porrmann M (2008)
In: Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society.
Konferenzbeitrag
| Veröffentlicht | Englisch
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Autor*in
Purnaprajna, M.;
Porrmann, MarioUniBi
Abstract / Bemerkung
High performance requirements often necessitate
redesigns for every new application, resulting in long time-tomarket.
Every architectural change involves costs in terms of
hardware design, verification and fabrication. As an alternative,
architectural flexibility provides easy adaptability to different
application domains in order to avoid the high cost of redesigns.
Hence, a method of reusing the basic building blocks within processors
to enable co-operative multiprocessing is proposed. Runtime
reconfiguration is used as a method for application-specific
customisation. Here, a method of application description in
conjunction with a flexible multiprocessor template is proposed.
Finally, the costs and benefits of this approach are analysed for
a computationally intensive algorithm in terms of execution time
and power consumption. The impact of variations in applicationspecific
characteristics on the proposed architecture, are also
analysed.
Erscheinungsjahr
2008
Titel des Konferenzbandes
Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society
Konferenzort
Lake Como, Italy
Konferenzdatum
November 8 - 12
Page URI
https://pub.uni-bielefeld.de/record/2494157
Zitieren
Purnaprajna M, Porrmann M. Run-time Reconfigurable Cluster of Processors. In: Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society. 2008.
Purnaprajna, M., & Porrmann, M. (2008). Run-time Reconfigurable Cluster of Processors. Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society
Purnaprajna, M., and Porrmann, Mario. 2008. “Run-time Reconfigurable Cluster of Processors”. In Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society.
Purnaprajna, M., and Porrmann, M. (2008). “Run-time Reconfigurable Cluster of Processors” in Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society.
Purnaprajna, M., & Porrmann, M., 2008. Run-time Reconfigurable Cluster of Processors. In Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society.
M. Purnaprajna and M. Porrmann, “Run-time Reconfigurable Cluster of Processors”, Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society, 2008.
Purnaprajna, M., Porrmann, M.: Run-time Reconfigurable Cluster of Processors. Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society. (2008).
Purnaprajna, M., and Porrmann, Mario. “Run-time Reconfigurable Cluster of Processors”. Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society. 2008.
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