Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks

Pohl C, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). IEEE Circuits and Systems Society, IEEE Electron Devices Society, Institute of Electrical and Electronics Engineers (Eds); Sydney, Australia: IEEE: 368-371.

Konferenzbeitrag | Veröffentlicht | Englisch
 
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herausgebende Körperschaft
IEEE Circuits and Systems Society; IEEE Electron Devices Society; Institute of Electrical and Electronics Engineers
Abstract / Bemerkung
In this paper we present the RAPTOR family as an advanced modular platform for both FPGA-based rapid prototyping and hardware acceleration. Using modern FPGAs and high speed communication links, performance and flexibility of the approach will be shown by means of Kohonens selforganizing map algorithm. This highly parallel algorithm is partitioned onto several FPGAs in different system environments, such as to demonstrate the scalability and the flexibility of the proposed platforms.
Erscheinungsjahr
2009
Titel des Konferenzbandes
Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09)
Seite(n)
368-371
ISBN
9781424443758
Page URI
https://pub.uni-bielefeld.de/record/2144880

Zitieren

Pohl C, Hagemeyer J, Porrmann M, Rückert U. Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks. In: IEEE Circuits and Systems Society, IEEE Electron Devices Society, Institute of Electrical and Electronics Engineers, eds. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Sydney, Australia: IEEE; 2009: 368-371.
Pohl, C., Hagemeyer, J., Porrmann, M., & Rückert, U. (2009). Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks. In IEEE Circuits and Systems Society, IEEE Electron Devices Society, & Institute of Electrical and Electronics Engineers (Eds.), Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09) (pp. 368-371). Sydney, Australia: IEEE. doi:10.1109/FPT.2009.5377611
Pohl, C., Hagemeyer, J., Porrmann, M., and Rückert, U. (2009). “Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks” in Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09), IEEE Circuits and Systems Society, IEEE Electron Devices Society, and Institute of Electrical and Electronics Engineers eds. (Sydney, Australia: IEEE), 368-371.
Pohl, C., et al., 2009. Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks. In IEEE Circuits and Systems Society, IEEE Electron Devices Society, & Institute of Electrical and Electronics Engineers, eds. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Sydney, Australia: IEEE, pp. 368-371.
C. Pohl, et al., “Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks”, Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09), IEEE Circuits and Systems Society, IEEE Electron Devices Society, and Institute of Electrical and Electronics Engineers, eds., Sydney, Australia: IEEE, 2009, pp.368-371.
Pohl, C., Hagemeyer, J., Porrmann, M., Rückert, U.: Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks. In: IEEE Circuits and Systems Society, IEEE Electron Devices Society, and Institute of Electrical and Electronics Engineers (eds.) Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). p. 368-371. IEEE, Sydney, Australia (2009).
Pohl, Christopher, Hagemeyer, Jens, Porrmann, Mario, and Rückert, Ulrich. “Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks”. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Ed. IEEE Circuits and Systems Society, IEEE Electron Devices Society, and Institute of Electrical and Electronics Engineers. Sydney, Australia: IEEE, 2009. 368-371.

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