CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories

Ax J, Sievers G, Daberkow J, Flasskamp M, Vohrmann M, Jungeblut T, Kelly W, Porrmann M, Rückert U (2018)
IEEE Transactions on Parallel and Distributed Systems 29(5): 1030-1043.

Zeitschriftenaufsatz | Veröffentlicht | Englisch
 
Download
OA 790.62 KB
Erscheinungsjahr
2018
Zeitschriftentitel
IEEE Transactions on Parallel and Distributed Systems
Band
29
Ausgabe
5
Seite(n)
1030-1043
ISBN
1045-9219
Page URI
https://pub.uni-bielefeld.de/record/2915905

Zitieren

Ax J, Sievers G, Daberkow J, et al. CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems. 2018;29(5):1030-1043.
Ax, J., Sievers, G., Daberkow, J., Flasskamp, M., Vohrmann, M., Jungeblut, T., Kelly, W., et al. (2018). CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems, 29(5), 1030-1043. doi:10.1109/TPDS.2017.2785799
Ax, Johannes, Sievers, Gregor, Daberkow, Julian, Flasskamp, Martin, Vohrmann, Marten, Jungeblut, Thorsten, Kelly, Wayne, Porrmann, Mario, and Rückert, Ulrich. 2018. “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”. IEEE Transactions on Parallel and Distributed Systems 29 (5): 1030-1043.
Ax, J., Sievers, G., Daberkow, J., Flasskamp, M., Vohrmann, M., Jungeblut, T., Kelly, W., Porrmann, M., and Rückert, U. (2018). CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems 29, 1030-1043.
Ax, J., et al., 2018. CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems, 29(5), p 1030-1043.
J. Ax, et al., “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”, IEEE Transactions on Parallel and Distributed Systems, vol. 29, 2018, pp. 1030-1043.
Ax, J., Sievers, G., Daberkow, J., Flasskamp, M., Vohrmann, M., Jungeblut, T., Kelly, W., Porrmann, M., Rückert, U.: CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems. 29, 1030-1043 (2018).
Ax, Johannes, Sievers, Gregor, Daberkow, Julian, Flasskamp, Martin, Vohrmann, Marten, Jungeblut, Thorsten, Kelly, Wayne, Porrmann, Mario, and Rückert, Ulrich. “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”. IEEE Transactions on Parallel and Distributed Systems 29.5 (2018): 1030-1043.
Alle Dateien verfügbar unter der/den folgenden Lizenz(en):
Copyright Statement:
Dieses Objekt ist durch das Urheberrecht und/oder verwandte Schutzrechte geschützt. [...]
Volltext(e)
Access Level
OA Open Access
Zuletzt Hochgeladen
2019-09-06T09:18:55Z
MD5 Prüfsumme
1515519407671300b81291a9d88ffa98