222 Publikationen

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  • [222]
    2023 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2982048
    Mika K, Griessl R, Kucza N, et al. VEDLIoT. Next generation accelerated AIoT systems and applications. In: CF '23: Proceedings of the 20th ACM International Conference on Computing Frontiers. New York, NY: ACM; 2023: 291-296.
    PUB | DOI
     
  • [221]
    2020 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2942756 OA
    Meyer HG, Klimeck D, Paskarbeit J, et al. Resource-efficient bio-inspired visual processing on the hexapod walking robot HECTOR. PloS one. 2020;15(4).
    PUB | PDF | DOI | WoS | PubMed | Europe PMC
     
  • [220]
    2019 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2933490 OA
    Lian Sang C, Adams M, Hörmann T, Hesse M, Porrmann M, Rückert U. Numerical and Experimental Evaluation of Error Estimation for Two-Way Ranging Methods. Sensors. 2019;19(3): 616.
    PUB | PDF | DOI | Download (ext.) | WoS | PubMed | Europe PMC
     
  • [219]
    2019 | Datenpublikation | PUB-ID: 2939390 OA
    Lian Sang C, Adams M, Hörmann T, Hesse M, Porrmann M, Rückert U. Supplementary Experimental Data for the Paper entitled Numerical and Experimental Evaluation of Error Estimation for Two-Way Ranging Methods. Bielefeld University; 2019.
    PUB | Dateien verfügbar | DOI
     
  • [218]
    2019 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2920469
    Oleksiak A, Kierzynka M, Porrmann M, et al. M2DC – A Novel Heterogeneous Hyperscale Microserver Platform. In: Kachris C, Falsafi B, Soudris D, eds. Hardware Accelerators in Data Centers. 1st ed. Cham, Switzerland: Springer International Publishing AG; 2019: 109-128.
    PUB | DOI
     
  • [217]
    2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2982045
    Cristal A, Unsal OS, Martorell X, et al. LEGaTO. First steps towards energy-efficient toolset for heterogeneous computing. In: SAMOS '18. Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. New York, NY: ACM; 2018: 210-217.
    PUB | DOI
     
  • [216]
    2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2979448
    Cristal A, Unsal OS, Martorell X, et al. LEGaTO. First steps towards energy-efficient toolset for heterogeneous computing. In: Mudge T, ed. Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation. New York, NY, USA: ACM; 2018: 210-217.
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  • [215]
    2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2955564
    Cristal A, Unsal OS, Martorell X, et al. LEGaTO Project: Towards Energy-Efficient, Secure, Fault-tolerant Toolset for Heterogeneous Computing. In: Kaeli D, ed. Proceedings of the 15th ACM International Conference on Computing Frontiers. New York, NY: ACM; 2018: 276-278.
    PUB | DOI | Download (ext.)
     
  • [214]
    2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2940681
    Klimeck D, Meyer HG, Hagemeyer J, Porrmann M, Rückert U. Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision Applications. In: 2018 IEEE 29th International Conference on Application-specific Systems, Architectures and Processors (ASAP). Piscataway, NJ: IEEE; 2018.
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  • [213]
    2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2921313 OA
    Lian Sang C, Adams M, Hörmann T, Hesse M, Porrmann M, Rückert U. An Analytical Study of Time of Flight Error Estimation in Two-Way Ranging Methods. In: 2018 International Conference on Indoor Positioning and Indoor Navigation (IPIN). Piscataway, NJ: IEEE; 2018.
    PUB | PDF | DOI | Download (ext.)
     
  • [212]
    2018 | Datenpublikation | PUB-ID: 2919795 OA
    Lian Sang C, Adams M, Hörmann T, Hesse M, Porrmann M, Rückert U. Supplementary Data for the Paper entitled ''An Analytical Study of Time of Flight Error Estimation in Two-Way Ranging Methods''. Bielefeld University; 2018.
    PUB | Dateien verfügbar | DOI
     
  • [211]
    2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905 OA
    Ax J, Sievers G, Daberkow J, et al. CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems. 2018;29(5):1030-1043.
    PUB | PDF | DOI | WoS
     
  • [210]
    2018 | Zeitschriftenaufsatz | E-Veröff. vor dem Druck | PUB-ID: 2920468
    Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U. FPGA-Based Vision Processing System for Automatic Online Player Tracking in Indoor Sports. Journal of Signal Processing Systems. 2018;91(7):703-729.
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  • [209]
    2018 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2918788 OA
    Kaiser M, Pilz S, Porrmann F, Hagemeyer J, Porrmann M. Accelerating Hamming Distance Comparisons for Locality Sensitive Hashing (LSH) using FPGAs. In: 12th CeBiTec Symposium - Big Data in Medicine and Biotechnology - Abstract Book. Vol 12. Bielefeld; 2018: 48-49.
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  • [208]
    2018 | Report | Veröffentlicht | PUB-ID: 2918509 OA
    Braun LD, Porrmann M. The Comprehensive MAC Taxonomy Database: comatose.; 2018.
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  • [207]
    2018 | Konferenzbeitrag | PUB-ID: 2921315
    Klarhorst C, Flasskamp M, Ax J, et al. Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems. Presented at the 6th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES 2018), Manchester, United Kingdom.
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  • [206]
    2017 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2908972
    Sievers G, Hübener B, Ax J, et al. The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio. In: Hussain W, Nurmi J, Isoaho J, Garzia F, eds. Computing Platforms for Software-Defined Radio. Cham, Switzerland: Springer International Publishing; 2017: 29--59.
    PUB | DOI
     
  • [205]
    2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2937407
    Agosta G, Barenghi A, Ciesielczyk T, et al. The M2DC Approach towards Resource-efficient Computing. In: Bagnato A, Couceiro R, Monteiro J, Petrovska-Delacrétaz D, Lopes A, Gouveia É, eds. OPPORTUNITIES AND CHALLENGES for European Projects. Volume 1: EPS Portugal 2017/2018. Setúbal, Portugal: SCITEPRESS; 2017: 150-176.
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  • [204]
    2017 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2912818
    Oleksiak A, Kierzynka M, Piatek W, et al. M2DC – Modular Microserver DataCentre with heterogeneous hardware. Microprocessors and Microsystems. 2017;52:117-130.
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  • [203]
    2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2912815
    Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U. Reconfigurable Vision Processing System for Player Tracking in Indoor Sports. In: Conference on Design and Architectures for Signal and Image Processing (DASIP 2017). Piscataway, NJ: IEEE; 2017: 1-6.
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  • [202]
    2017 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2909430
    Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U. FPGA-based Multi-Robot Tracking. Journal of Parallel and Distributed Computing. 2017;107:146-161.
    PUB | DOI | Download (ext.) | WoS
     
  • [201]
    2017 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2918683 OA
    Kaiser M, Griessl R, Hagemeyer J, et al. A Reconfigurable Heterogeneous Microserver Architecture for Energy-efficient Computing. In: Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC'17). Denver, CO; 2017.
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  • [200]
    2017 | Konferenzbeitrag | Angenommen | PUB-ID: 2912816
    Ax J, Kucza N, Vohrmann M, Jungeblut T, Porrmann M, Rückert U. Comparing synchronous, mesochronous and asynchronous NoCs for GALS based MPSoC. In: IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17). Accepted.
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  • [199]
    2017 | Konferenzbeitrag | PUB-ID: 2909584
    Oleksiak A, Kierzynka M, Piatek W, et al. M2DC: Modular Microserver Datacentre with Heterogeneous Hardware. Presented at the Energy-efficient Servers for Cloud and Edge Computing 2017 Workshop (ENeSCE 2017) - co-located with HiPEAC 2017, Stockholm, Sweden.
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  • [198]
    2017 | Report | PUB-ID: 2913643 OA
    Romoth J, Porrmann M, Rückert U. Survey of FPGA applications in the period 2000 – 2015 (Technical Report).; 2017.
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  • [197]
    2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2909044
    Lachmair J, Mieth T, Griessl R, Hagemeyer J, Porrmann M. From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining. In: International Joint Conference on Neural Networks (IJCNN 2017). 2017: 4299-4308.
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  • [196]
    2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2900363 OA
    Flasskamp M, Sievers G, Ax J, et al. Performance Estimation of Streaming Applications for Hierarchical MPSoCs. In: Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO). New York, NY: ACM Press; 2016: 1.
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  • [195]
    2016 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2908973
    Cozzi D, Korf S, Cassano L, et al. OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems. IEEE Transactions on Emerging Topics in Computing. 2016;PP(99):1-1.
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  • [194]
    2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2908974
    Oleksiak A, Porrmann M, Hagemeyer J, et al. Data centres for IoT applications: The M2DC approach (Invited paper). In: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS). IEEE; 2016: 293-299.
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  • [193]
    2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2908980
    Cecowski M, Agosta G, Oleksiak A, et al. The M2DC Project: Modular Microserver DataCentre. In: 2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers (IEEE); 2016.
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  • [192]
    2016 | Kurzbeitrag Konferenz / Poster | PUB-ID: 2909602
    Griessl R, Peykanu M, Tigges L, Hagemeyer J, Porrmann M. FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers. Presented at the Workshop "Reconfigurable Computing — From Embedded Systems to Reconfigurable Hyperscale Servers" co-located with the International Conference on Field-Programmable Logic and Applications (FPL 2016), Lausanne, Switzerland.
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  • [191]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2783142 OA
    Ax J, Sievers G, Flasskamp M, Kelly W, Jungeblut T, Porrmann M. System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In: Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc). New York, NY, USA: ACM; 2015: 3-8.
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  • [190]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732427
    Sievers G, Ax J, Kucza N, et al. Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI. In: 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE; 2015: 1925-1928.
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  • [189]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2760622
    Sievers G, Daberkow J, Ax J, et al. Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI. In: International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC). IEEE; 2015: 175-181.
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  • [188]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901107
    Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U. A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms. In: Hübner M, Gokhale M, Cumplido R, eds. 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). Piscataway, NJ: IEEE; 2015: 1-6.
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  • [187]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901108
    Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U. FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking. In: Hübner M, Gokhale M, Cumplido R, eds. 2015 International Conference on ReConFigurable Computing and FPGAs (ReConFig). Piscataway, NJ: IEEE; 2015: 1-8.
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  • [186]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732419
    Buda A, Walter M, Hartfiel J, et al. Automatische Protokollanpassung von Echtzeit-Ethernet-Standards durch FPGA-Technologien. Presented at the Automation 2015, Baden-Baden.
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  • [185]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732431
    Herbrechtsmeier S, Jungeblut T, Porrmann M. Datenflussmodellierung als Methode zur Optimierung von Entwicklungsprozessen am Beispiel der Leiterplattenentwicklung. In: Entwurf mechatronischer Systeme. Vol 343. Paderborn: HNI Verlagsschriftenreihe; 2015.
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  • [184]
    2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2902039 OA
    Griessl R, Peykanu M, Hagemeyer J, et al. FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters. Presented at the First International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC‘15), held in conjunction with Supercomputing 2015, Austin Texas, USA.
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  • [183]
    2015 | Konferenzbeitrag | PUB-ID: 2902041
    Vohrmann M, Chatterjee S, Lütkemeier S, Jungeblut T, Porrmann M, Rückert U. A 65 nm Standard Cell Library for Ultra Low-power Applications. Presented at the 22nd European Conference on Circuit Theory and Design, ECCTD2015, Trondheim, Norway.
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  • [182]
    2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698992
    Irwansyah A, Ibraheem OW, Klimeck D, Porrmann M, Rückert U. FPGA-based Generic Architecture for Rapid Prototyping of Video Hardware Accelerators using NoC AXI4-Stream Interconnect and GigE Vision Camera Interfaces. Presented at the Bildverarbeitung in der Automation (BVAu) 2014, Lemgo, Germany.
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  • [181]
    2014 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2732400
    Gausemeier J, Korf S, Porrmann M, Stahl K, Sudmann O, Vaßholz M. Development of Self-Optimizing Systems. In: Gausemeier J, Rammig FJ, Schäfer W, eds. Design Methodology for Intelligent Technical Systems. Develop Intelligent Technical Systems of the Future. Lecture Notes in Mechanical Engineering. Berlin Heidelberg: Springer Verlag; 2014: 65-117.
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  • [180]
    2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681323
    Sabena D, Sterpone L, Schölzel M, et al. Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications. In: Proceedings of 19th IEEE European Test Symposium (ETS). IEEE; 2014: 175-182.
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  • [179]
    2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698994
    Walter M, Ax J, Buda A, et al. Dynamische Rekonfiguration von Echtzeit-Ethernet-Standards mit harten Echtzeit­anforderungen. Presented at the Kommunikation in der Automation – KommA 2014, Lemgo, Germany.
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  • [178]
    2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698999
    Sorrenti D, Cozzi D, Korf S, et al. Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems. Presented at the 17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Amsterdam, The Netherlands.
    PUB | DOI | Download (ext.)
     
  • [177]
    2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2699005
    Cozzi D, Jungewelter D, Kleibrink D, et al. AXI-based SpaceFibre IP CORE Implementation. Presented at the 6th International SpaceWire Conference, Athens, Greece.
    PUB | DOI | Download (ext.)
     
  • [176]
    2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698929
    Hübener B, Sievers G, Jungeblut T, Porrmann M, Rückert U. CoreVA: A Configurable Resource-efficient VLIW Processor Architecture. In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing. IEEE; 2014: 9-16.
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  • [175]
    2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698930
    Griessl R, Peykanu M, Hagemeyer J, et al. A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters. In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014. IEEE; 2014: 146-153.
    PUB | DOI | Download (ext.)
     
  • [174]
    2014 | Konferenzbeitrag | PUB-ID: 2681362
    Cassano L, Cozzi D, Jungewelter D, et al. An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems. Presented at the DTIS 2014, 9th International conference on Design & Technology of Integrated Systems in Nanoscale Era, Santorini , Greece.
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  • [173]
    2014 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2732260
    Seifried A, Trächtler A, Kleinjohann B, et al. Methods of Improving the Dependability of Self-optimizing Systems. In: Gausemeier J, Rammig FJ, Schäfer W, Sextro W, eds. Dependability of Self-Optimizing Mechatronic Systems. Lecture Notes in Mechanical Engineering. Berlin Heidelberg: Springer Verlag; 2014: 37-171.
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  • [172]
    2014 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2920470
    Dellnitz M, Dumistrescu R, Flasskamp K, Gausemeier J, Korf S, Porrmann M. The Paradigm of Self-optimization. In: Gausemeier J, Rammig F-J, Schäfer W, eds. Design Methodology for Intelligent Technical Systems – Develop Intelligent Technical Systems of the Future. Lecture notes in mechanical engineering. Berlin Heidelberg: Springer; 2014: 1-25.
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  • [171]
    2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2560236
    Lütkemeier S, Jungeblut T, Berge HKO, Aunet S, Porrmann M, Rückert U. A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control. IEEE Journal Of Solid-State Circuits. 2013;48(1):8-19.
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  • [170]
    2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2576115 OA
    Korf S, Sievers G, Ax J, et al. Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme. In: Gausemeier J, Dumitrescu R, Rammig F, Trächtler A, eds. Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme. HNI-Verlagsschriftenreihe. Vol 310. Paderborn: Heinz-Nixdorf-Inst., Univ. Paderborn; 2013: 79-90.
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  • [169]
    2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2637667
    Sievers G, Christ P, Einhaus J, Jungeblut T, Porrmann M, Rückert U. Design-Space Exploration of the Configurable 32 bit VLIW Processor CoreVA for Signal Processing Applications. In: 2013 NORCHIP. 2013.
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  • [168]
    2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2634649
    Christ P, Sievers G, Einhaus J, Jungeblut T, Porrmann M, Rückert U. Pareto-optimal Signal Processing on Low-Power Microprocessors. In: Proceedings of the 12th IEEE International Conference on SENSORS. IEEE; 2013: 1843-1846.
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  • [167]
    2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2622226
    Sterpone L, Porrmann M, Hagemeyer J. A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing. IEEE Transactions on Computers. 2013;62(8):1508-1525.
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  • [166]
    2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681289
    Desogus M, Sterpone L, Porrmann M, Hagemeyer J, Illstad J. Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience. In: RADECS proceedings. Vol 2. IEEE / Institute of Electrical and Electronics Engineers; 2013: 13-16.
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  • [165]
    2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681304
    Sterpone L, Sabena D, Ullah A, Porrmann M, Hagemeyer J, Ilstad J. Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture. In: Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on. IEEE; 2013: 184-188.
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  • [164]
    2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2634614
    Jungeblut T, Hübener B, Porrmann M, Rückert U. A Systematic Approach for Optimized Bypass Configurations for Application-specific Embedded Processors. ACM Trans. Embed. Comput. Syst. 2013;13(2):1-25.
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  • [163]
    2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2576042
    Cassano L, Cozzi D, Korf S, Hagemeyer J, Porrmann M, Sterpone L. On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems. In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013. Piscataway, NJ: IEEE; 2013: 717-720.
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  • [162]
    2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2575531
    Lachmair J, Merényi E, Porrmann M, Rückert U. A reconfigurable neuroprocessor for self-organizing feature maps. Neurocomputing. 2013;112(SI):189-199.
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  • [161]
    2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2559365
    Romoth J, Jungewelter D, Hagemeyer J, Porrmann M, Rückert U. Optimizing inter-FPGA communication by automatic channel adaptation. In: 2012 International Conference on Reconfigurable Computing and FPGAs. 5 - 7 Dec. 2012, Cancun, Mexico . Piscataway, NJ: IEEE; 2012: 1-7.
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  • [160]
    2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493811
    Lachmair J, Merenyi E, Porrmann M, Rückert U. gNBXe - a Reconfigurable Neuroprocessor for Various Types of Self-Organizing Maps. In: European Symposium on Artificial Neural Networks, Computational Intelligence and Machine Learning. 2012: 645-650.
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  • [159]
    2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2475063
    Lütkemeier S, Jungeblut T, Porrmann M, Rückert U. A 200mV 32b Subthreshold Processor with Adaptive Supply Voltage Control. In: Institute of Electrical and Electronics Engineers, ed. Proc. of the International Solid-State Circuits Conference (ISSCC). Piscataway, NJ: IEEE; 2012: 484-485.
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  • [158]
    2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2517354
    Hagemeyer J, Hilgenstein A, Jungewelter D, et al. A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing. In: 2012 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2012). Piscataway, NJ: IEEE; 2012: 9-16.
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  • [157]
    2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493814
    Durelli G, Santambrogio MD, Cresci F, Porrmann M, Sciuto D. Mini-Robot's Performance Optimization via Online Reconfiguration and HW/SW Task Scheduling. In: 19th Reconfigurable Architectures Workshop (RAW 2012). 2012.
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  • [156]
    2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493813
    Jungeblut T, Ax J, Porrmann M, Rückert U. A TCMS-based architecture for GALS NoCs. In: IEEE Circuits and Systems Society, Institute of Electrical and Electronics Engineers, eds. 2012 IEEE International Symposium on Circuits and Systems. Piscataway, NJ: IEEE; 2012.
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  • [155]
    2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286173
    Korf S, Cozzi D, Koester M, et al. Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs. In: Chow P, ed. IEEE 19th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM), 2011 : 1 - 3 May 2011, Salt Lake City, Utah, USA ; proceedings . Piscataway, NJ: IEEE; 2011: 125-132.
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  • [154]
    2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493823
    Grawinkel M, Schäfers T, Brinkmann A, Hagemeyer J, Porrmann M. Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability. In: Association for Computing Machinery, Institute of Electrical and Electronics Engineers, Nanyang Technological University, eds. MASCOTS2011 The 19th Annual Meeting of the IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems. Piscataway, NJ: IEEE; 2011: 297-306.
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  • [153]
    2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493819
    Sterpone L, Margaglia F, Köster M, Hagemeyer J, Porrmann M. Analysis of SEU Effects in Partially Reconfigurable SoPCs. In: European Space Agency, Jet Propulsion Laboratory, USA. National Aeronautics and Space Administration, The University of Edinburgh. National Aeronautics and Space Administration, eds. Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011). Piscataway, NJ: IEEE; 2011: 129-136.
    PUB | DOI
     
  • [152]
    2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494507
    Romoth J, Hagemeyer J, Porrmann M, Rückert U. Fast Design-space Exploration with FPGA Cluster. In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing. 2011.
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  • [151]
    2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2476993 OA
    Jungeblut T, Ax J, Sievers G, Hübener B, Porrmann M, Rückert U. Resource Efficiency of Scalable Processor Architectures for SDR-based Applications (Invited). In: Proc. of the Radar, Communication and Measurement Conference (RADCOM). 2011.
    PUB | Dateien verfügbar
     
  • [150]
    2011 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493623
    Nava F, Sciuto D, Santambrogio MD, et al. Applying dynamic reconfiguration in the mobile robotics domain: a case study on computer vision algorithms. ACM Transactions on Reconfigurable Technology and Systems (TRETS). 2011;4(3):1-22.
    PUB | DOI | WoS
     
  • [149]
    2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494510
    Griessl R, Herbrechtsmeier S, Porrmann M, Rückert U. A Low-Power Vision Processing Platform for Mobile Robots. In: Proceedings of the FPL2011 Workshop on Computer Vision on Low-Power Reconfigurable Architectures. 2011.
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  • [148]
    2011 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2494497
    Köster M, Hagemeyer J, Margaglia F, et al. Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications. In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing. 2011.
    PUB
     
  • [147]
    2011 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2018536
    Jungeblut T, Liß C, Porrmann M, Rückert U. Design-space Exploration for Flexible WLAN Hardware. In: Zorba N, Skianis C, Verikoukis C, eds. Cross Layer Designs in WLAN Systems. Leicester, UK: Troubador Publishing; 2011: 521-564.
    PUB
     
  • [146]
    2010 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2494479
    Pohl C, Fuest R, Porrmann M. vMAGIC – Automatic Code Generation for VHDL. newsletter edacentrum. 2010;2009:1-9.
    PUB | DOI
     
  • [145]
    2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493826
    Dittmann F, Linke M, Hagemeyer J, et al. Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks. In: Proceedings of the International SpaceWire Conference 2010. 2010: 193-196.
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  • [144]
    2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472693 OA
    Porrmann M, Hagemeyer J, Pohl C, Romoth J, Strugholtz M. RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing. In: Parallel Computing: From Multicores and GPU's to Petascale, Advances in Parallel Computing. Vol 19. IOS press; 2010: 592-599.
    PUB | PDF
     
  • [143]
    2010 | Patent | Veröffentlicht | PUB-ID: 2494087
    Christmann W, Strugholtz M, Hagemeyer J, Porrmann M. Mehrprozessor-Computersystem. 2010.
    PUB
     
  • [142]
    2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286622
    Puttmann C, Porrmann M, Rückert U. Extending GigaNoC towards a Dependable Network-on-Chip. In: Digest of the DAC Workshop on Diagnostic Services in Network-on-Chips (DSNOC). 2010.
    PUB
     
  • [141]
    2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2018549
    Jungeblut T, Sievers G, Porrmann M, Rückert U. Design Space Exploration for Memory Subsystems of VLIW Architectures. In: 5th IEEE International Conference on Networking, Architecture, and Storage. 2010: 377-385.
    PUB | DOI
     
  • [140]
    2010 | Konferenzbeitrag | PUB-ID: 2286616
    Jungeblut T, Dreesen R, Porrmann M, Thies M, Rückert U, Kastens U. A Framework for the Design Space Exploration of Software-Defined Radio Applications.
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  • [139]
    2010 | Konferenzbeitrag | PUB-ID: 2286628 OA
    Jungeblut T, Lütkemeier S, Sievers G, Porrmann M, Rückert U. A modular design flow for very large design space explorations.
    PUB | Dateien verfügbar
     
  • [138]
    2010 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2018541 OA
    Jungeblut T, Puttmann C, Dreesen R, et al. Resource Efficiency of Hardware Extensions of a 4-issue VLIW Processor for Elliptic Curve Cryptography. Advances in Radio Science. 2010;8:295-305.
    PUB | PDF | DOI | Download (ext.)
     
  • [137]
    2010 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2145423
    Koester M, Luk W, Hagemeyer J, Porrmann M, Rückert U. Design Optimizations for Tiled Partially Reconfigurable Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 2010;19(6):1048-1061.
    PUB | DOI | WoS
     
  • [136]
    2010 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2018557
    Purnaprajna M, Porrmann M, Rückert U, Hussmann M, Thies M, Kastens U. Runtime Reconfiguration of Multiprocessors Based on Compile-Time Analysis. ACM Transactions on Reconfigurable Technology. 2010;3(3):1-25.
    PUB | DOI | WoS
     
  • [135]
    2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2018564
    Puttmann C, Porrmann M, Grassi PR, Santambrogio MD, Rückert U. High Level Specification of Embedded Listeners for Monitoring of Network-on-Chips. In: Proceedings of the IEEE International Symposium on Circuits and Systems. 2010: 3333-3336.
    PUB | DOI
     
  • [134]
    2009 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493628
    Pohl C, Paiz C, Porrmann M. vMAGIC - Automatic Code Generation for VHDL. International Journal of Reconfigurable Computing, Hindawi Publishing Corporation,. 2009;2009(Article ID 205149):1-9.
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  • [133]
    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493880
    Porrmann M, Purnaprajna M, Puttmann C. Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance. In: European Space Agency, Jet Propulsion Laboratory, The University of Edinburgh, eds. NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). Piscataway, NJ: IEEE; 2009: 467-473.
    PUB | DOI
     
  • [132]
    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472673
    Koester M, Luk W, Hagemeyer J, Porrmann M. Design Optimizations to Improve Placeability of Partial Reconfiguration Modules. In: European Design Automation Association, ed. Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009). Piscataway, NJ: ACM Press; 2009.
    PUB | DOI | Download (ext.)
     
  • [131]
    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472678
    Porrmann M, Hagemeyer J, Romoth J, Strugholtz M. Rapid Prototyping of Next-Generation Multiprocessor SoCs. In: Proceedings of Semiconductor Conference Dresden, SCD 2009. Dresden, Germany; 2009.
    PUB
     
  • [130]
    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472686
    Grassi PR, Santambrogio M, Hagemeyer J, Pohl C, Porrmann M. SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems. In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '09). Las Vegas, USA; 2009: 174-180.
    PUB
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493870
    Grassi PR, Santambrogio M, Puttmann C, Pohl C, Porrmann M. A High Level Methodology for Monitoring Network-on-Chips. In: Diagnostic Services in Network-on-Chips (DSNOC 2009), Workshop at Design, Automation and Test in Europe. 2009.
    PUB
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144752 OA
    Purnaprajna M, Pohl C, Porrmann M, Rückert U. Using Run-time Reconfiguration for Energy Savings in Parallel Data Processing. In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms, ERSA'09, July 13-16, 2009, Las Vegas, Nevada, USA. 2009: 119-125.
    PUB | PDF
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144757
    Dreesen R, Jungeblut T, Thies M, Porrmann M, Rückert U, Kastens U. A Synchronization Method for Register Traces of Pipelined Processors. In: Proceedings of the International Embedded Systems Symposium 2009 (IESS '09). Schloss Langenargen, Germany; 2009: 207-217.
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  • [126]
    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144891
    Paiz C, Pohl C, Radkowski R, Hagemeyer J, Porrmann M, Rückert U. FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications. In: IEEE Circuits and Systems Society, IEEE Electron Devices Society, Institute of Electrical and Electronics Engineers, eds. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia: IEEE; 2009: 372-375.
    PUB | DOI
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493834
    Herath V, Peveling R, Pfau T, et al. Cipset for a Coherent Polarization-Multiplexed QPSK Receiver. In: Institute of Electrical and Electronics Engineers, Optical Society of America, eds. Proceedings of OFC/NFOEC 2009. Piscataway, NJ: OSA; 2009.
    PUB | DOI
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144772
    Liß C, Porrmann M, Rückert U. InCyte ChipEstimator in Research and Education. In: CDNLive EMEA 2009. 2009.
    PUB
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144830
    Jungeblut T, Klassen D, Dreesen R, et al. Design Space Exploration for Next Generation Wireless Technologies (invited talk). In: Proc. of the Electrical and Electronic Engineering for Communication Conference (EEEfCOM) 2009. 2009.
    PUB
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144880
    Pohl C, Hagemeyer J, Porrmann M, Rückert U. Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks. In: IEEE Circuits and Systems Society, IEEE Electron Devices Society, Institute of Electrical and Electronics Engineers, eds. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Sydney, Australia: IEEE; 2009: 368-371.
    PUB | DOI
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493855
    Pfau T, Peveling R, Herath V, et al. Towards Real-Time Implementation of Coherent Optical Communication. In: Institute of Electrical and Electronics Engineers, Optical Society of America, eds. Proceedings of OFC/NFOEC 2009. Piscataway, NJ: OSA; 2009.
    PUB | DOI
     
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494485
    Pohl C, Fuest R, Porrmann M. Manageable Dynamic Reconfiguration with EVE – Extendable VHDL Editor. In: Design Automation and Test in Europe (DATE), University Booth. 2009.
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  • [119]
    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144724 OA
    Grassi PR, Pohl C, Porrmann M. Reconfiguration Viewer. In: Design Automation and Test in Europe, DATE University Booth. Nice, France; 2009.
    PUB | PDF
     
  • [118]
    2009 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2144870
    Purnaprajna M, Porrmann M, Rückert U. Run-time reconfigurability in embedded multiprocessors. ACM SIGARCH Computer Architecture News. 2009;37(2):30-37.
    PUB | DOI | Download (ext.)
     
  • [117]
    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144782
    Liß C, Porrmann M, Rückert U. Early Exploration of Network Processor Architectures Using Cadence InCyte Chip Estimator. In: CDNLive EMEA 2009. 2009.
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    2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144843 OA
    Paiz C, Hagemeyer J, Pohl C, et al. FPGA-Based Realization of Self-Optimizing Drive-Controllers. In: IEEE Industrial Electronics Society, Institute of Electrical and Electronics Engineers, Keisoku-jidō-seigyō-gakkai, Universidade do Porto, eds. the 35th Annual Conference of the IEEE Industrial Electronics Society (IECON 2009). Piscataway, NJ: IEEE; 2009: 2868-2873.
    PUB | PDF | DOI | Download (ext.)
     
  • [115]
    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2942215
    Purnaprajna M, Puttmann C, Porrmann M. Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography. In: 2008 Design, Automation and Test in Europe. Piscataway, NJ: IEEE; 2008: 1462-1467.
    PUB | DOI
     
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493929
    Purnaprajna M, Puttmann C, Porrmann M. Power Aware Reconfigurable Multiprocessor for Elliptic Curve Cryptography. In: Proceedings of DATE '08: Design, Automation and Test in Europe. ACM; 2008: 1462-1467.
    PUB | DOI | Download (ext.)
     
  • [113]
    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494491
    Pohl C, Paiz C, Porrmann M. A Hardware-in-the-Loop Design Environment for FPGAs. In: Design, Automation and Test in Europe (DATE), University Booth. 2008.
    PUB
     
  • [112]
    2008 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2493607
    Paiz C, Pohl C, Porrmann M. Hardware-in-the-Loop Simulations for FPGA-Based Digital Control Design. In: Andrade-Cetto J, Ferrier J-L, dias Pereira J'e MC, Filipe J, eds. Informatics in Control, Automation and Robotics. Vol 3. Berlin, Heidelberg: Springer-Verlag; 2008: 355-372.
    PUB | DOI
     
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493900
    Pfau T, Wördehoff C, Peveling R, et al. Ultra-Fast Adaptive Digital Polarization Control in a Realtime Coherent Polarization-Multiplexed QPSK Receiver. In: Proceedings of OFC/NFOEC 2008. 2008.
    PUB | Download (ext.)
     
  • [110]
    2008 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493648
    El-Darawy M, Pfau T, Hoffmann S, et al. Fast Adaptive Polarization and PDL Tracking in a Real-Time FPGA-Based Coherent PolDM-QPSK Receiver. IEEE Photonics Technology Letters. 2008;20(21):1796-1798.
    PUB | DOI | WoS
     
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    2008 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493667
    Hoffmann S, Bhandare S, Pfau T, et al. Frequency and Phase Estimation for Coherent QPSK Transmission With Unlocked DFB Lasers. IEEE Photonics Technology Letters. 2008;20(18):1569-1571.
    PUB | DOI | WoS
     
  • [108]
    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493890
    Münch E, Gambuzza A, Paiz C, Pohl C, Porrmann M. FPGA-in-the-Loop Simulations with CAMEL-View. In: Self-optimizing Mechatronic Systems: Design the Future, 7th International Heinz Nixdorf Symposium. 2008: 429-445.
    PUB
     
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493939
    Puttmann C, Shokrollahi J, Porrmann M. Resource Efficiency of Instruction Set Extensions for Elliptic Curve Cryptography. In: IEEE Computer Society, Institute of Electrical and Electronics Engineers, eds. Proceedings of the 5th Internation Conference on Information Technology: New Generations, ITNG 2008. Piscataway, NJ: IEEE; 2008: 131-136.
    PUB | DOI
     
  • [106]
    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493960
    Pohl C, Paiz C, Porrmann M. vMAGIC – VHDL Manipulation and Automation for Reliable System Development. In: Proceedings of the 3rd International Workshop on Reconfigurable Computing Education (on CD). 2008.
    PUB
     
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494141
    El-Darawy M, Pfau T, Wördehoff C, et al. Realtime 40 krad/s Polarization Tracking with 6 dB PDL in Digital Synchronous Polarization-Multiplexed QPSK Receiver. In: Proceedings of European Conference on Optical Communication (ECOC). IEEE; 2008.
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472725
    Hagemeyer J, Koester M, Porrmann M. Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures. In: 1. GI/ITG KuVS Fachgespräch Virtualisierung. Heinz Nixdorf Institut, Universität Paderborn; 2008.
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493945
    Griese B, Brinkmann A, Porrmann M. SelfS – A Real-Time Protocol for Virtual Ring Topologies. In: IEEE Computer Society. Technical Committee on Parallel Processing, Institute of Electrical and Electronics Engineers. Technical Committee on Parallel Processing, eds. Proceedings of the 16th International Workshop on Parallel and Distributed Real-Time Systems (WPDRTS '08), on CD. Piscataway, NJ: IEEE; 2008.
    PUB | DOI
     
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493957
    Purnaprajna M, Porrmann M. Run-time Reconfigurable Multiprocessors. In: Proceedings of the 22nd International Parallel and Distributed Processing Symposium (IPDPS 2008), PhD Forum. 2008.
    PUB
     
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494157
    Purnaprajna M, Porrmann M. Run-time Reconfigurable Cluster of Processors. In: Proceedings of 41st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO-41 2008), Workshop on Design, Architecture and Simulation of Chip Multi-Processors, IEEE Computer Society. 2008.
    PUB | Download (ext.)
     
  • [100]
    2008 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2289237 OA
    Jungeblut T, Grünewald M, Porrmann M, Rückert U. Realtime multiprocessor for mobile ad hoc networks. Advances in Radio Science. 2008;6:239-243.
    PUB | PDF | DOI | Download (ext.)
     
  • [99]
    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493966
    Hoffmann S, Pfau T, Adamczyk O, et al. Frequency Estimation and Compensation for Coherent QPSK Transmission with DFB Lasers. In: Proc. OSA Topical Meeting Coherent Optical Technologies and Applications (COTA). OSA; 2008.
    PUB | DOI | Download (ext.)
     
  • [98]
    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494096
    Pfau T, El-Darawy M, Wördehoff C, et al. 32-krad/s Polarization and 3-dB PDL Tracking in a Realtime Digital Coherent Polarization-Multiplexed QPSK Receiver. In: IEEE Lasers and Electro-Optics Society, ed. Proceedings of the 2008 IEEE-LEOS Summer Topical Meetings. Piscataway, NJ: IEEE; 2008: 105-106.
    PUB | DOI
     
  • [97]
    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2289205
    Jungeblut T, Dreesen R, Porrmann M, Rückert U, Hachmann U. Design Space Exploration for Resource Efficient VLIW-Processors. In: University Booth of the Design, Automation and Test in Europe (DATE) conference. 2008.
    PUB
     
  • [96]
    2008 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2289175 OA
    Puttmann C, Shokrollahi J, Porrmann M, Rückert U. Hardware Accelerators for Elliptic Curve Cryptography. Advances in Radio Science. 2008;6:259-264.
    PUB | PDF | DOI | Download (ext.)
     
  • [95]
    2008 | Monographie | Veröffentlicht | PUB-ID: 2493583
    Adelt P, Donoth J, Gausemeier J, et al. Selbstoptimierende Systeme des Maschinenbaus – Definitionen, Anwendungen, Konzepte. Vol Band 234. HNI-Verlagsschriftenreihe; 2008.
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    2008 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493684
    Pfau T, Hoffmann S, Adamczyk O, et al. Coherent optical communication: Towards realtime systems at 40 Gbit/s and beyond. Optics Express. 2008;16(2):866-872.
    PUB | DOI | WoS | PubMed | Europe PMC
     
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    2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494113
    Noe R, Hoffmann S, Pfau T, et al. Realtime digital polarization and carrier recovery in a polarization-multiplexed optical QPSK transmission. In: IEEE Lasers and Electro-Optics Society, ed. Proceedings of the 2008 IEEE/LEOS Summer Topical Meetings. Piscataway, NJ: IEEE; 2008: 99-100.
    PUB | DOI
     
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286362
    Puttmann C, Niemann J-C, Porrmann M, Rückert U. GigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors. In: 10th Euromicro Conference on Digital System Design Architectures, Methods and Tools (DSD 2007). Piscataway, NJ: IEEE; 2007: 495-502.
    PUB | DOI | Download (ext.)
     
  • [91]
    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472738
    Hagemeyer J, Kettelhoit B, Koester M, Porrmann M. Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs. In: Proc. of the Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA '07). Las Vegas, USA; 2007.
    PUB | Download (ext.)
     
  • [90]
    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494198
    Paiz C, Porrmann M. The Utilization of Reconfigurable Hardware to Implement Digital Controllers: a Review. In: Proceedings of the IEEE International Symposium on Industrial Electronics. IEEE; 2007: 2380-2385.
    PUB | DOI
     
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472729
    Schulz B, Paiz C, Hagemeyer J, Mathapati S, Porrmann M, Böcker J. Run-Time Reconfiguration of FPGA-Based Drive Controllers. In: European Conference on Power Electronics and Applications (EPE 2007). Aalborg, Denmark: IEEE; 2007.
    PUB | DOI
     
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472743
    Hagemeyer J, Kettelhoit B, Koester M, Porrmann M. A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS. In: IEEE Circuits and Systems Society, Technische Universiteit Delft, eds. Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). Amsterdam, Netherlands: IEEE; 2007: 331-338.
    PUB | DOI
     
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472748
    Hagemeyer J, Kettelhoit B, Koester M, Porrmann M. INDRA – Integrated Design Flow for Reconfigurable Architectures. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth. 2007.
    PUB | Download (ext.)
     
  • [86]
    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2289033 OA
    Hussmann M, Thies M, Kastens U, Purnaprajna M, Porrmann M, Rückert U. Compiler-Driven Reconfiguration of Multiprocessors. In: Proceedings of the Workshop on Application Specific Processors (WASP) 2007. 2007.
    PUB | PDF | Download (ext.)
     
  • [85]
    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2289057
    Jungeblut T, Grünewald M, Porrmann M, Rückert U. Real-Time Multiprocessor SoC for Mobile Ad Hoc Networks. In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth, 2007. 2007.
    PUB | Download (ext.)
     
  • [84]
    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494165
    Paiz C, Kettelhoit B, Porrmann M. A design framework for FPGA-based dynamically reconfigurable digital controllers. In: Institute of Electrical and Electronics Engineers, ed. Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS2007). Piscataway, NJ: IEEE; 2007: 3709-3711.
    PUB | DOI
     
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494230
    Pfau T, Peveling R, Hoffmann S, et al. PDL-Tolerant Real-time Polarization-Multiplexed QPSK Transmission with Digital Coherent Polarization Diversity Receiver. In: IEEE Lasers and Electro-Optics Society, ed. Proceedings of the 2007 IEEE/LEOS Summer Topical Meetings. Piscataway, NJ: IEEE; 2007: 17-18.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494285
    Pfau T, Peveling R, Samson F, et al. Polarization-Multiplexed 2.8 Gbit/s Synchronous QPSK Transmission with Real-Time Digital Polarization Tracking. In: Proceedings of ECOC. Vol 3. IEE; 2007: 263-264.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494514
    Porrmann M. Flexible Hardware Platforms for Dynamic Reconfiguration. In: Invited Talk at the 2nd Int. Conf. on Industrial and Information Systems (ICIIS 2007), Reconfigurable Computing Workshop. 2007.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285993
    Rana V, Santambrogio M, Sciuto D, et al. Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux. In: IEEE Computer Society. Technical Committee on Parallel Processing, Institute of Electrical and Electronics Engineers. Technical Committee on Parallel Processing, eds. Proceedings of the 21st International Parallel and Distributed Processing Symposium (IPDPS 2007) - Reconfigurable Architecture Workshop (RAW), IEEE Computer Society. Piscataway, NJ: IEEE; 2007.
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    2007 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493699
    Pfau T, Peveling R, Hauden Y, et al. Coherent Digital Polarization Diversity Receiver for Real-Time Polarization-Multiplexed QPSK Transmission at 2.8 Gb/s. Photonics Technology Letters, IEEE. 2007;19(24):1988-1990.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494159
    Pohl C, Paiz C, Porrmann M. Hardware-in-the-Loop Entwicklungsumgebung fuer informationsverarbeitende Komponenten mechatronischer Systeme. In: 5. Paderborner Workshop Entwurf mechatronischer Systeme. 2007: 69-79.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494262
    Pfau T, Adamczyk O, Herath V, et al. Realtime Optical Synchronous QPSK Transmission with DFB lasers. In: IEEE Lasers and Electro-Optics Society, ed. Proceedings of the 2007 IEEE/LEOS Summer Topical Meetings. Piscataway, NJ: IEEE; 2007: 15-16.
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    2007 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2145016
    Niemann J-C, Puttmann C, Porrmann M, Rückert U. Resource efficiency of the GigaNetIC chip multiprocessor architecture. Journal of System Architecture. 2007;53(5-6):285-299.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494202
    Noe R, Pfau T, Adamczyk O, et al. Real-time Digital Carrier & Data Recovery for a Synchronous Optical Quadrature Phase Shift Keying Transmission System. In: IEEE Microwave Theory and Techniques Society, ed. Proceedings of System Microwave Symposium. IEEE/MTT-S International. Piscataway, NJ: IEEE; 2007: 1503-1506.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494512
    Porrmann M. A Layer-Model Based Methodology for the Design of Dynamically Reconfigurable Systems. Invited Talk. In: 2nd Int. Conf. on Industrial and Information Systems (ICIIS 2007), Reconfigurable Computing Workshop. 2007.
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    2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2289049
    Niemann J-C, Liß C, Porrmann M, Rückert U. A Multiprocessor Cache for Massively Parallel SoC Architectures. In: Lukowicz P, ed. ARCS'07: Architecture of Computing Systems. Lecture Notes in Computer Science. Vol 4415. Zurich, Switzerland: Springer Berlin Heidelberg; 2007: 83-97.
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    2007 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2285724
    Köster M, Kalte H, Porrmann M, Rückert U. Defragmentation Algorithms for Partially Reconfigurable Hardware. VLSI-SoC: From Systems to Silicon. 2007;240:41-53.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494328
    Hoffmann S, Pfau T, Adamczyk O, Peveling R, Porrmann M, Noe R. Hardware-Efficient and Phase Noise Tolerant Digital Synchronous QPSK Receiver Concept. In: Proceedings Optical Amplifiers and Their Applications/Coherent Optical Technologies and Applications. Optical Society of America; 2006.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494326
    Kalte H, Porrmann M. REPLICA2Pro: Task Relocation by Bitstream Manipulation in VIRTEX-II/Pro FPGAs. In: Alderighi M, ed. Proceedings of the 3rd Conference on Computing Frontiers. New York: ACM; 2006: 403-412.
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  • [69]
    2006 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2285718
    Porrmann M, Witkowski U, Rückert U. Implementation of Self-Organizing Feature Maps in Reconfigurable Hardware. In: Omondi A, Rajapakse J, eds. FPGA Implementations of Neural Networks. Boston, MA: Springer; 2006: 247-269.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494321
    Porrmann M, Niemann J-C. Teaching Reconfigurable Computing Theory and Practice. In: International Workshop on Reconfigurable Computing Education (on CD). 2006.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494340
    Koester M, Kalte H, Porrmann M. Relocation and Defragmentation for Heterogeneous Reconfigurable Systems. In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '06). CSREA Press; 2006: 70-76.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494364
    Kettelhoit B, Porrmann M. A Layer Model for Systematically Designing Dynamically Reconfigurable Systems. In: IEEE Circuits and Systems Society, Escuela Politécnica Superior (Madrid), eds. Proceedings of the 16th International Conference on Field Programmable Logic and Applications. Piscataway, NJ: IEEE; 2006: 547-552.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494390
    Pfau T, Hoffmann S, Peveling R, et al. 1.6 Gbit/s Real-Time Synchronous QPSK Transmission with Standard DFB Lasers. In: Proceedings of the 32nd European Conference on Optical Communication (ECOC 2006). IEEE; 2006.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2473942
    Hagemeyer J, Kettelhoit B, Porrmann M. Dedicated Module Access in Dynamically Reconfigurable Systems. In: Association for Computing Machinery, ed. Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS). ACM Digital Library. Washington, DC: IEEE; 2006: 1.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494374
    Griese B, Kettelhoit B, Porrmann M. Evaluation of on-chip interfaces for dynamically reconfigurable coprocessors. In: IEEE Computer Society. Technical Committee on Parallel Processing, Institute of Electrical and Electronics Engineers. Poland Section, eds. Proceedings of the 5th International Symposium on Parallel Computing in Electrical Engineering. Los Alamitos, Calif. : IEEE; 2006: 214-219.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494380
    Sauer C, Gries M, Niemann J-C, Porrmann M, Thies M. Application-driven Development of Concurrent Packet Processing Platforms. In: Proceedings of the 5th International Symposium on Parallel Computing in Electrical Engineering. 2006: 55-61.
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  • [61]
    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494405
    Paiz C, Chinapirom T, Witkowski U, Porrmann M. Dynamically Reconfigurable Hardware for Autonomous Mini-Robots. In: 32nd Annual Conference of the IEEE Industrial Electronics Society (IECON-2006). IEEE; 2006: 3981-3986.
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    2006 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493726
    Pfau T, Hoffmann S, Peveling R, et al. First Real-Time Data Recovery for SynchroneusQPSK Transmission with Standard DFB Lasers. IEEE PHOTONICS TECHNOLOGY LETTERS. 2006;18(18):1907-1909.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494368
    Paiz C, Pohl C, Porrmann M. Reconfigurable Hardware in-the-Loop Simulations for Digital Control Design. In: 3th International Conference on Informatics in Control, Automation and Robotics (ICINCO). 2006: 39-46.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288961
    Niemann J-C, Puttmann C, Porrmann M, Rückert U. GigaNetIC – A Scalable Embedded On-Chip Multiprocessor Architecture for Network Applications. In: Grass W, ed. ARCS'06 Architecture of Computing Systems. Lecture notes in computer science. Vol 3894. Berlin, Heidelberg: Springer Berlin Heidelberg; 2006: 268-282.
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    2006 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2493754
    Pfau T, Hoffmann S, Peveling R, et al. Synchronous QPSK transmission at 1.6 Gbit/s with standard DFB lasers and real-time digital receiver. IEEE Electronic Letters. 2006;42(20):1175-1176.
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    2006 | Patent | Veröffentlicht | PUB-ID: 2494093
    Niemann J-C, Sauer C, Porrmann M, Rückert U. Flexible Beschleunigungseinheit für die Verarbeitung von Datenpaketen. 2006.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494346
    Hoffmann S, Pfau T, Peveling R, et al. Synchrone 1,6-Gbits-QPSK-Datenübertragung in Echtzeit mit DFB-Lasern. In: Workshop der ITG Fachgruppe 5.3.1, Modellierung photonischer Komponenten und Systeme. 2006: 21-27.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494360
    Griese B, Porrmann M. A Reconfigurable Ethernet Switch for Self-Optimizing Communication Systems. In: Proceedings of the IFIP Conference on Biologically Inspired Cooperative Computing (BICC 2006). Springer US; 2006: 115-125.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286278
    Jäger B, Porrmann M, Rückert U. Bio-inspired massively parallel architectures for nanotechnologies. In: IEEE Circuits and Systems Society, ed. Proceeding of the IEEE International Symposium on Circuits and Systems (ISCAS 2006). Piscataway, NJ: IEEE; 2006: 1961-1964.
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    2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288969 OA
    Sauer C, Gries M, Dirk S, Niemann J-C, Porrmann M, Rückert U. A Lightweight NoC for the NOVA Packet Processing Plattform. In: Design, Automation and Test in Europe DATE, Future Interconnect and Network-on-Chip (NoC) Workshop. Munich, Germany; 2006.
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  • [51]
    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288882 OA
    Eickhoff R, Niemann J-C, Porrmann M, Rückert U. Adaptable Switch boxes as on-chip routing nodes for networks-on-chip. In: Rettberg A, Zanella MC, Rammig FJ, eds. From Specification to Embedded Systems Application . IFIP On-Line Library in Computer Science. Vol 184. Boston, MA: Springer; 2005: 201-210.
    PUB | PDF | DOI | Download (ext.)
     
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494412
    Griese B, Oberthür S, Porrmann M. Component case study of a self-optimizing RCOS/RTOS system. A reconfigurable network service. In: Rettberg A, Zanella MC, Rammig FJ, eds. From Specification to Embedded Systems Application. IFIP On-Line Library in Computer Science . Vol 184. Boston, MA: Springer; 2005: 267-277.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288910
    Liß C, Peveling R, Porrmann M, Rückert U. Technologieplanung in der Mikroelektronik – von Moore's Law zur Nanotechnologie-Roadmap. In: Symposium fuer Vorausschau und Technologieplanung. Berlin, Germany; 2005: 87-103.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494437
    Koester M, Kalte H, Porrmann M. Task Placement for Heterogeneous Reconfigurable Architectures. In: IEEE Circuits and Systems Society. Singapore Chapter, IEEE Electron Devices Society. Singapore Chapter, Institute of Electrical and Electronics Engineers. Singapore Section, School of Computing (Singapur). Singapore Section, eds. Proceedings of the IEEE 2005 Conference on Field-Programmable Technology (FPT '05). Piscataway, NJ: IEEE; 2005: 43-50.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494424
    Kalte H, Porrmann M. Context Saving and Restoring for Multitasking in Reconfigurable Systems. In: IEEE Circuits and Systems Society, Tampereen Teknillinen Yliopisto, eds. 15th International Conference on Field Programmable Logic and Applications. Piscataway, NJ: IEEE; 2005: 223-228.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494429
    Koester M, Kalte H, Porrmann M. Run-Time Defragmentation for Partially Reconfigurable Systems. In: Proceedings of the International Conference on Very Large Scale Integration (IFIP VLSI-SOC). 2005: 109-115.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288900
    Kettelhoit B, Klassen A, Paiz C, Porrmann M, Rückert U. Rekonfigurierbare Hardware zur Regelung mechatronischer Systeme. In: 3. Paderborner Workshop: Intelligente mechatronische Systeme. 2005: 195-205.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286050
    Koester M, Porrmann M, Rückert U. Placement-Oriented Modeling of Partially Reconfigurable Architectures. In: Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, on CD. 2005.
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  • [43]
    2005 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2145286
    Grünewald M, Niemann J-C, Porrmann M, Rückert U. A framework for design space exploration of resource efficient network processing on multiprocessor SoCs. In: Crowely P, Franklin MA, Hadimioglu H, Onufryk PZ, eds. Network Processor Design: Issues and Practices. Vol 3. Morgan Kaufmann Publisher; 2005: 245-277.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288853 OA
    Niemann J-C, Porrmann M, Sauer C, Rückert U. An Evaluation of the Scalable GigaNetIC Architecture for Access Networks. In: Advanced Networking and Communications Hardware Workshop (ANCHOR), held in conjunction with the 32nd Annual International Symposium on Computer Architecture (ISCA 2005). 2005.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288944
    Paiz C, Kettelhoit B, Klassen A, Porrmann M, Rückert U. Dynamically reconfigurable hardware for digital controllers in mechatronic systems. In: IEEE Industrial Electronics Society, ed. IEEE International Conference on Mechatronics (ICM 2005). Piscataway, NJ: IEEE; 2005: 675-680.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288829
    Kettelhoit B, Kalte H, Porrmann M, Rückert U. Dynamically Reconfigurable Hardware for Self-Optimizing Mechatronic Systems. In: 5. GMM/ITG/GI-Workshop Multi-Nature Systems. 2005: 97-101.
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    2005 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2285654
    Kalte H, Kettelhoit B, Koester M, Porrmann M, Rückert U. A System Approach for Partially Reconfigurable Architectures. International Journal of Embedded Systems (IJES), Inderscience Publisher. 2005;1(3/4):274-290.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286119
    Kalte H, Lee G, Porrmann M, Rückert U. REPLICA: A Bitstream Manipulation Filter for Module Relocation in Partial Reconfigurable Systems. In: Proceedings of the 19th International Parallel and Distributed Processing Symposium (IPDPS 2005) - Reconfigurable Architectures Workshop (RAW), IEEE Computer Society, on CD. IEEE; 2005.
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    2005 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286309
    Niemann J-G, Porrmann M, Rückert U. A scalable parallel SoC architecture for network processors. In: VLSI, 2005. Proceedings. IEEE Computer Society Annual Symposium on. IEEE; 2005: 311-313.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494463
    Hagen G, Niemann J-C, Porrmann M, Sauer C, Slowik A, Thies M. Developing an IP-DSLAM Benchmark for Network Processor Units. In: ANCHOR 2004, Advanced Networking and Communications Hardware Workshop, held in conjunction with the 31st Annual International Symposium on Computer Architecture (ISCA 2004). 2004.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285912
    Vonnahme E, Griese G, Porrmann M, Rückert U. Dynamic Reconfiguration of Real-Time Network Interfaces. In: IEEE Computer Society. Technical Committee on Parallel Processing, Technische Universität Dresden. Technical Committee on Parallel Processing, eds. Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. Los Alamitos, Calif. : IEEE Comput. Soc; 2004: 376-379.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288708
    Kalte H, Porrmann M, Rückert U. Leistungsbewertung unterschiedlicher Einbettungsvarianten dynamisch rekonfigurierbarer Hardware. In: ARCS 2004 – Organic and Pervasive Computing. 2004: 234-244.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288760
    Vonnahme E, Griese B, Porrmann M, Rückert U. Dynamische Rekonfiguration echtzeitfähiger Netzwerkschnittstellen. In: VDE Kongress 2004 – ITG Fachtagung 'Ambient Intelligence'. Berlin, Germany: VDE Verlag; 2004: 99-104.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286101
    Grunewald M, Niemann J-C, Porrmann M, Rückert U. A mapping strategy for resource-efficient network processing on multiprocessor SoCs. In: European Design Automation Association, ed. Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings. Vol 2. Los Alamitos, Calif. : IEEE Comput. Soc; 2004: 758-763.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286233
    Kalte H, Lee G, Porrmann M, Rückert U. Study on column wise design compaction for reconfigurable systems. In: IEEE Electron Devices Society, School of Information Technology and Electrical Engineering, eds. Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on. Piscataway, NJ: IEEE; 2004: 413-416.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288776
    Niemann J-C, Porrmann M, Rückert U. Parallele Architekturen für Netzwerkprozessoren. In: Ambient Intelligence, VDE Kongress. Vol 1. VDE Verlag; 2004: 105-110.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288730
    Kalte H, Koester M, Kettelhoit B, Porrmann M, Rückert U. A Comparative Study on System Approaches for Partially Reconfigurable Architectures. In: Plaks T, ed. Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '04). Las Vegas, Nevada, USA: CSREA Press; 2004: 70-76.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288742
    Griese B, Vonnahme E, Porrmann M, Rückert U. Hardware Support for Dynamic Reconfiguration in Reconfigurable SoC Architectures. In: Becker J, ed. Proceedings of the 14th International Conference on Field Programmable Logic and its Applications (FPL2004). Lecture notes in computer science. Vol 3203. Antwerp, Belgium: Springer Berlin Heidelberg; 2004: 842-846.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286146
    Grunewald M, Le DK, Kastens U, et al. Network application driven instruction set extensions for embedded processing clusters. In: IEEE Computer Society. Technical Committee on Parallel Processing, Technische Universität Dresden. Technical Committee on Parallel Processing, eds. Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. Los Alamitos, Calif. : IEEE Comput. Soc; 2004: 209-214.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288700
    Grünewald M, Niemann J-C, Porrmann M, Rückert U. A framework for design space exploration of resource efficient network processing on multiprocessor SoCs. In: Proceedings of the 3rd Workshop on Network Processors & Applications. Madrid, Spain; 2004: 87-101.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285942
    Franzmeier M, Pohl C, Porrmann M, Rückert U. Hardware Accelerated Data Analysis. In: IEEE Computer Society. Technical Committee on Parallel Processing, Technische Universität Dresden. Technical Committee on Parallel Processing, eds. Parallel Computing in Electrical Engineering, 2004. PARELEC 2004. International Conference on. Los Alamitos, Calif. : IEEE Comput. Soc; 2004: 309-314.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286356
    Kalte H, Porrmann M, Rückert U. System-on-programmable-chip approach enabling online fine-grained 1D-placement. In: Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International. IEEE; 2004: 141.
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    2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286138
    Pohl C, Franzmeier M, Porrmann M, Rückert U. gNBX - reconfigurable hardware acceleration of self-organizing maps. In: IEEE Electron Devices Society, School of Information Technology and Electrical Engineering, eds. Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on. Piscataway, NJ: IEEE; 2004: 97-104.
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    2003 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286024
    Bonorden O, Bruls N, Kastens U, et al. A holistic methodology for network processor design. In: Local Computer Networks, 2003. LCN '03. Proceedings. 28th Annual IEEE International Conference on. IEEE; 2003: 583-592.
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    2003 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2145324
    Porrmann M, Witkowski U, Rückert U. A Massively Parallel Architecture for Self-Organizing Feature Maps. IEEE Transactions on Neural Networks, Special Issue on Hardware Implementations. 2003;14(5):1110-1121.
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    2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288575
    Kalte H, Porrmann M, Rückert U. A Prototyping Platform for Dynamically Reconfigurable System on Chip Designs. In: Proceedings of the IEEE Workshop Heterogeneous reconfigurable Systems on Chip (SoC). Hamburg, Germany; 2002.
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    2002 | Monographie | Veröffentlicht | PUB-ID: 2493620
    Porrmann M. Leistungsbewertung eingebetteter Neurocomputersysteme. Dissertation. Vol 104. Paderborn: HNI-Verlagsschriftenreihe, Heinz Nixdorf Institut, Schaltungstechnik; 2002.
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    2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288603 OA
    Porrmann M, Franzmeier M, Kalte H, Witkowski U, Rückert U. A Reconfigurable SOM Hardware Accelerator.
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    2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288565 OA
    Langen D, Niemann J-C, Porrmann M, Kalte H, Rückert U. Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation. In: Proceedings of the IEEE-Workshop: Heterogeneous reconfigurable Systems on Chip (SoC). Hamburg, Germany; 2002.
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    2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288589
    Porrmann M, Witkowski U, Kalte H, Rückert U. Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations. In: Glesner M, ed. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Lecture notes in computer science. Vol 2438. Montpellier, France: Springer Berlin Heidelberg; 2002: 1048-1057.
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    2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285896
    Porrmann M, Witkowski U, Kalte H, Rückert U. Implementation of artificial neural networks on a reconfigurable hardware accelerator. In: Parallel, Distributed and Network-based Processing, 2002. Proceedings. 10th Euromicro Workshop on. IEEE Comput. Soc; 2002: 243-250.
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    2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285966
    Brinkmann A, Niemann J-C, Hehemann I, Langen D, Porrmann M, Rückert U. On-chip interconnects for next generation system-on-chips. In: ASIC/SOC Conference, 2002. 15th Annual IEEE International. IEEE; 2002: 211-215.
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    2001 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288549
    Porrmann M, Rüping S, Rückert U. The Impact of Communication on Hardware Accelerators for Neural Networks. In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI). Vol 3. Orlando, Florida, USA; 2001: 248-253.
    PUB
     
  • [12]
    2001 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288555 OA
    Niemann J-C, Witkowski U, Porrmann M, Rückert U. Extension Module for Application-Specific Hardware on the Minirobot Khepera. In: Autonomous Minirobots for Research and Edutainment (AMiRE 2001). Paderborn, Germany; 2001: 279-288.
    PUB | PDF
     
  • [11]
    2001 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288526
    Porrmann M, Rückert U, Landmann J, Marks KM. XipChip – A Multiprocessor CPU for Multifunction Peripherals. In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics (SCI). Vol 15. Orlando, Florida, USA; 2001: 512-517.
    PUB
     
  • [10]
    2001 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288539
    Porrmann M, Kalte H, Witkowski U, Niemann J-C, Rückert U. A Dynamically Reconfigurable Hardware Accelerator for Self-Organizing Feature Maps. In: Proceedings of The 5th World Multi-Conference on Systemics, Cybernetics and Informatics, SCI 2001. Vol 3. Orlando, Florida, USA; 2001: 242-247.
    PUB
     
  • [9]
    2000 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286566
    Kalte H, Porrmann M, Rückert U. Rapid Prototyping System für dynamisch rekonfigurierbare Hardwarestrukturen. In: Workshop: Architekturentwurf und Entwicklung eingebetteter Systeme (AES2000). Karlsruhe, Germany; 2000: 149-157.
    PUB
     
  • [8]
    2000 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286572
    Kalte H, Porrmann M, Rückert U. Using a Dynamically Reconfigurable System to Accelerate Octree Based 3D Graphics. In: Proceedings of the International Conference on Parallel and Distributed Processing Techniques and Applications (PDPTA´2000). Vol 5. Monte Carlo Resort, Las Vegas, Nevada, USA; 2000: 2819-2824.
    PUB
     
  • [7]
    1999 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286315
    Porrmann M, Ruping S, Rückert U. SOM hardware with acceleration module for graphical representation of the learning process. In: Microelectronics for Neural, Fuzzy and Bio-Inspired Systems, 1999. MicroNeuro '99. Proceedings of the Seventh International Conference on. IEEE Comput. Soc; 1999: 380-386.
    PUB | DOI
     
  • [6]
    1998 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286468
    Porrmann M, Heittmann A, Rüping S, Rückert U. A Hybrid Knowledge Processing System. In: Proceedings of the Conference Neural Networks and their Applications (NEURAP). Marseille, France; 1998: 177-184.
    PUB
     
  • [5]
    1998 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2285592
    Rüping S, Porrmann M, Rückert U. SOM Accelerator System. Neurocomputing. 1998;21:31-50.
    PUB | Download (ext.)
     
  • [4]
    1997 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286384 OA
    Rüping S, Porrmann M, Rückert U. A High Performance SOFM Hardware-System. In: Proceedings of the International Work-Conference on Artificial and Natural Neural Networks (IWANN´97). Lanzarote, Spain; 1997: 772-781.
    PUB | PDF | Download (ext.)
     
  • [3]
    1997 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286402 OA
    Rüping S, Porrmann M, Rückert U. SOM Hardware-Accelerator. In: Workshop on Self-Organizing Maps (WSOM). Espoo, Finnland; 1997: 136-141.
    PUB | PDF | Download (ext.)
     
  • [2]
    1997 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286241
    Porrmann M, Landmann J, Marks KM, Rückert U. HIBRIC-MEM, a Memory Controller for PowerPC Based Systems. In: Proceedings of the 23rd EUROMICRO Conference. Budapest, Ungarn: IEEE Comput. Soc; 1997: 653-663.
    PUB | DOI
     
  • [1]
    1996 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285575
    Palm G, Rückert U, Porrmann M, Schwenker F. Neuronale Assoziativspeicher. In: Neuroinformatik Statusseminar. 1996: 419-432.
    PUB
     

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