Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations

Porrmann M, Witkowski U, Kalte H, Rückert U (2002)
In: Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Glesner M (Ed); Lecture notes in computer science, 2438. Montpellier, France: Springer Berlin Heidelberg: 1048-1057.

Konferenzbeitrag | Veröffentlicht | Englisch
 
Download
Es wurden keine Dateien hochgeladen. Nur Publikationsnachweis!
Autor*in
Porrmann, MarioUniBi ; Witkowski, Ulf; Kalte, Heiko; Rückert, UlrichUniBi
Herausgeber*in
Glesner, Manfred
Abstract / Bemerkung
Today’s high-density FPGAs and intellectual property (IP) components enable the integration of complex systems in one programmable chip. New design strategies and concepts have to be developed in order to utilize the new system-level integration facilities. The approach introduced within this paper describes the implementation of a communication infrastructure that provides a number of on-chip IP-sockets. By using the FPGA-feature of partial dynamic reconfiguration, different IP components can be plugged into these sockets during runtime. This leads to a reconfigurable system that can be adapted to varying demands. In this context we designed a 32-bit RISC processor and an AMBA on-chip interconnection bus. Finally we mapped these components on a reconfigurable systemlevel FPGA. The resulting sizes and the utilization of the FPGA’s resources are presented within the last part of this paper.
Erscheinungsjahr
2002
Titel des Konferenzbandes
Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002)
Band
2438
Seite(n)
1048-1057
ISBN
9783540441083
ISSN
0302-9743
Page URI
https://pub.uni-bielefeld.de/record/2288589

Zitieren

Porrmann M, Witkowski U, Kalte H, Rückert U. Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations. In: Glesner M, ed. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Lecture notes in computer science. Vol 2438. Montpellier, France: Springer Berlin Heidelberg; 2002: 1048-1057.
Porrmann, M., Witkowski, U., Kalte, H., & Rückert, U. (2002). Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations. In M. Glesner (Ed.), Lecture notes in computer science: Vol. 2438. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002) (pp. 1048-1057). Montpellier, France: Springer Berlin Heidelberg. doi:10.1007/3-540-46117-5_107
Porrmann, M., Witkowski, U., Kalte, H., and Rückert, U. (2002). “Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations” in Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002), Glesner, M. ed. Lecture notes in computer science, vol. 2438, (Montpellier, France: Springer Berlin Heidelberg), 1048-1057.
Porrmann, M., et al., 2002. Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations. In M. Glesner, ed. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Lecture notes in computer science. no.2438 Montpellier, France: Springer Berlin Heidelberg, pp. 1048-1057.
M. Porrmann, et al., “Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations”, Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002), M. Glesner, ed., Lecture notes in computer science, vol. 2438, Montpellier, France: Springer Berlin Heidelberg, 2002, pp.1048-1057.
Porrmann, M., Witkowski, U., Kalte, H., Rückert, U.: Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations. In: Glesner, M. (ed.) Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Lecture notes in computer science. 2438, p. 1048-1057. Springer Berlin Heidelberg, Montpellier, France (2002).
Porrmann, Mario, Witkowski, Ulf, Kalte, Heiko, and Rückert, Ulrich. “Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations”. Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002). Ed. Manfred Glesner. Montpellier, France: Springer Berlin Heidelberg, 2002.Vol. 2438. Lecture notes in computer science. 1048-1057.

Export

Markieren/ Markierung löschen
Markierte Publikationen

Open Data PUB

Suchen in

Google Scholar
ISBN Suche