Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance
Porrmann M, Purnaprajna M, Puttmann C (2009)
In: NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). European Space Agency, Jet Propulsion Laboratory, The University of Edinburgh (Eds); Piscataway, NJ: IEEE: 467-473.
Konferenzbeitrag
| Veröffentlicht | Englisch
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Autor*in
Porrmann, MarioUniBi 
;
Purnaprajna, Madhura;
Puttmann, Christoph
;
Purnaprajna, Madhura;
Puttmann, Christophherausgebende Körperschaft
European Space Agency;
Jet Propulsion Laboratory;
The University of Edinburgh
Abstract / Bemerkung
A dynamically reconfigurable on-chip multiprocessor architecture will be presented, which can be adapted to changing application demands and to faults detected at runtime. The scalable architecture comprises lightweight embedded RISC processors that are interconnected by a hierarchical network-on-chip (NoC). Reconfigurability is integrated into the processors as well as into the NoC with minimal area and performance overhead. Adaptability of the architecture relies on a self-optimizing reconfiguration of the MPSoC at run-time. The resource-efficiency of the proposed architecture is analyzed based on FPGA and ASIC prototypes.
Erscheinungsjahr
2009
Titel des Konferenzbandes
NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009)
Seite(n)
467-473
Konferenzort
San Francisco, California, USA
Konferenzdatum
July 29 - August 1
ISBN
9780769537146
Page URI
https://pub.uni-bielefeld.de/record/2493880
Zitieren
Porrmann M, Purnaprajna M, Puttmann C. Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance. In: European Space Agency, Jet Propulsion Laboratory, The University of Edinburgh, eds. NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). Piscataway, NJ: IEEE; 2009: 467-473.
Porrmann, M., Purnaprajna, M., & Puttmann, C. (2009). Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance. In European Space Agency, Jet Propulsion Laboratory, & The University of Edinburgh (Eds.), NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009) (pp. 467-473). Piscataway, NJ: IEEE. doi:10.1109/ahs.2009.52
Porrmann, Mario, Purnaprajna, Madhura, and Puttmann, Christoph. 2009. “Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance”. In NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009), ed. European Space Agency, Jet Propulsion Laboratory, and The University of Edinburgh, 467-473. Piscataway, NJ: IEEE.
Porrmann, M., Purnaprajna, M., and Puttmann, C. (2009). “Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance” in NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009), European Space Agency, Jet Propulsion Laboratory, and The University of Edinburgh eds. (Piscataway, NJ: IEEE), 467-473.
Porrmann, M., Purnaprajna, M., & Puttmann, C., 2009. Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance. In European Space Agency, Jet Propulsion Laboratory, & The University of Edinburgh, eds. NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). Piscataway, NJ: IEEE, pp. 467-473.
M. Porrmann, M. Purnaprajna, and C. Puttmann, “Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance”, NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009), European Space Agency, Jet Propulsion Laboratory, and The University of Edinburgh, eds., Piscataway, NJ: IEEE, 2009, pp.467-473.
Porrmann, M., Purnaprajna, M., Puttmann, C.: Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance. In: European Space Agency, Jet Propulsion Laboratory, and The University of Edinburgh (eds.) NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). p. 467-473. IEEE, Piscataway, NJ (2009).
Porrmann, Mario, Purnaprajna, Madhura, and Puttmann, Christoph. “Self-optimization of MPSoCs Targeting Resource Efficiency and Fault Tolerance”. NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2009). Ed. European Space Agency, Jet Propulsion Laboratory, and The University of Edinburgh. Piscataway, NJ: IEEE, 2009. 467-473.
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