A mapping strategy for resource-efficient network processing on multiprocessor SoCs

Grunewald M, Niemann J-C, Porrmann M, Rückert U (2004)
In: Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings. European Design Automation Association (Ed); , 2. Los Alamitos, Calif. : IEEE Comput. Soc: 758-763.

Konferenzbeitrag | Veröffentlicht | Englisch
 
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Autor*in
Grunewald, M.; Niemann, J.-C.; Porrmann, MarioUniBi ; Rückert, UlrichUniBi
herausgebende Körperschaft
European Design Automation Association
Abstract / Bemerkung
Hardware architectures based on a field of hardwareextended processors can provide flexible computing power for applications where parallelism can be exploited. For multiprocessors, the assignment of functionality to execution units can have a great impact on the performance. Additionally, finding the optimal mapping can be a timeconsuming task. We present a multiprocessor architecture along with a suitable design method that includes an automated solution to the mapping problem. Our hardware architecture employs a network-on-chip (NoC) to achieve a high degree of scalability for the application and for the system in respect to future integration technologies.We also show how to reduce the packet buffer requirements with a proper scheduling strategy and present first estimates for the resource consumption of an application targeted for mobile networking.
Stichworte
ad hoc networks; integer programming; hardware extended processors; mobile networking; multiprocessor SoCs; multiprocessor system-on-chip; network on-chip; parallelism; optimal mapping; packet buffer; resource consumption; access protocols; scheduling; resource efficient network processing; multiprocessor interconnection networks; linear programming; system-on-chip; parallel processing; processor scheduling
Erscheinungsjahr
2004
Titel des Konferenzbandes
Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings
Band
2
Seite(n)
758-763
ISBN
0769520855
ISSN
1530-1591
Page URI
https://pub.uni-bielefeld.de/record/2286101

Zitieren

Grunewald M, Niemann J-C, Porrmann M, Rückert U. A mapping strategy for resource-efficient network processing on multiprocessor SoCs. In: European Design Automation Association, ed. Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings. Vol 2. Los Alamitos, Calif. : IEEE Comput. Soc; 2004: 758-763.
Grunewald, M., Niemann, J. - C., Porrmann, M., & Rückert, U. (2004). A mapping strategy for resource-efficient network processing on multiprocessor SoCs. In European Design Automation Association (Ed.), Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings (Vol. 2, pp. 758-763). Los Alamitos, Calif. : IEEE Comput. Soc. doi:10.1109/DATE.2004.1268970
Grunewald, M., Niemann, J. - C., Porrmann, M., and Rückert, U. (2004). “A mapping strategy for resource-efficient network processing on multiprocessor SoCs” in Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings, European Design Automation Association ed., vol. 2, (Los Alamitos, Calif. : IEEE Comput. Soc), 758-763.
Grunewald, M., et al., 2004. A mapping strategy for resource-efficient network processing on multiprocessor SoCs. In European Design Automation Association, ed. Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings. no.2 Los Alamitos, Calif. : IEEE Comput. Soc, pp. 758-763.
M. Grunewald, et al., “A mapping strategy for resource-efficient network processing on multiprocessor SoCs”, Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings, European Design Automation Association, ed., vol. 2, Los Alamitos, Calif. : IEEE Comput. Soc, 2004, pp.758-763.
Grunewald, M., Niemann, J.-C., Porrmann, M., Rückert, U.: A mapping strategy for resource-efficient network processing on multiprocessor SoCs. In: European Design Automation Association (ed.) Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings. 2, p. 758-763. IEEE Comput. Soc, Los Alamitos, Calif. (2004).
Grunewald, M., Niemann, J.-C., Porrmann, Mario, and Rückert, Ulrich. “A mapping strategy for resource-efficient network processing on multiprocessor SoCs”. Design, Automation and Test in Europe Conference and Exhibition, 2004. Proceedings. Ed. European Design Automation Association. Los Alamitos, Calif. : IEEE Comput. Soc, 2004.Vol. 2. 758-763.

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