46 Publications

Mark all

[46]
2017 | Journal Article | PUB-ID: 2909430
FPGA-based Multi-Robot Tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2017)
Journal of Parallel and Distributed Computing 107: 146-161.
PUB | DOI
 
[45]
2017 | Journal Article | PUB-ID: 2912818
M2DC – Modular Microserver DataCentre with heterogeneous hardware
Oleksiak A, Kierzynka M, Piatek W, Agosta G, Barenghi A, Porrmann M, Hagemeyer J, Griessl R, Lachmair J, Peykanu M, Tigges L, et al. (2017)
Microprocessors and Microsystems 52: 117-130.
PUB | DOI
 
[44]
2017 | Conference Paper | PUB-ID: 2909044
From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining
Lachmair J, Mieth T, Griessl R, Hagemeyer J, Porrmann M (2017)
In: International Joint Conference on Neural Networks (IJCNN 2017). 4299-4308.
PUB
 
[43]
2017 | Conference Paper | PUB-ID: 2912815
Reconfigurable Vision Processing System for Player Tracking in Indoor Sports
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (Accepted)
In: Conference on Design and Architectures for Signal and Image Processing (DASIP 2017).
PUB
 
[42]
2017 | Conference Paper | PUB-ID: 2909584
M2DC: Modular Microserver Datacentre with Heterogeneous Hardware
Oleksiak A, Kierzynka M, Piatek W, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, et al. (2017)
Presented at the Energy-efficient Servers for Cloud and Edge Computing 2017 Workshop (ENeSCE 2017) - co-located with HiPEAC 2017, Stockholm, Sweden.
PUB
 
[41]
2016 | Conference Abstract | PUB-ID: 2909602
FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers
Griessl R, Peykanu M, Tigges L, Hagemeyer J, Porrmann M (2016)
Presented at the Workshop "Reconfigurable Computing — From Embedded Systems to Reconfigurable Hyperscale Servers" co-located with the International Conference on Field-Programmable Logic and Applications (FPL 2016), Lausanne, Switzerland.
PUB
 
[40]
2016 | Journal Article | PUB-ID: 2908973
OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems
Cozzi D, Korf S, Cassano L, Hagemeyer J, Domenici A, Bernardeschi C, Porrmann M, Sterpone L (2016)
IEEE Transactions on Emerging Topics in Computing PP(99): 1-1.
PUB | DOI
 
[39]
2016 | Conference Paper | PUB-ID: 2908974
Data centres for IoT applications: The M2DC approach (Invited paper)
Oleksiak A, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, Christmann W, vor dem Berge M, Krupop S, Cudennec L, Cecowski M, et al. (2016)
In: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS). 293-299.
PUB | DOI
 
[38]
2016 | Conference Paper | PUB-ID: 2908980
The M2DC Project: Modular Microserver DataCentre
Cecowski M, Agosta G, Oleksiak A, Kierzynka M, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, et al. (2016)
In: 2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers (IEEE).
PUB | DOI
 
[37]
2016 | Journal Article | PUB-ID: 2903257
Energy Efficiency of Sequence Alignment Tools - Software and Hardware Perspectives
Kierzynka M, Kosmann L, vor dem Berge M, Krupop S, Hagemeyer J, Griessl R, Peykanu M, Oleksiak A (2016)
Future Generation Computer Systems 67: 455-465.
PUB | PDF | DOI | WoS
 
[36]
2015 | Conference Paper | PUB-ID: 2902039
FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, vor dem Berge M, Kosmann L, Knocke P, Kierzynka M, Oleksiak A (2015)
Presented at the First International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC‘15), held in conjunction with Supercomputing 2015, Austin Texas, USA.
PUB | PDF
 
[35]
2015 | Conference Paper | PUB-ID: 2901108
FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-8.
PUB | DOI
 
[34]
2015 | Conference Paper | PUB-ID: 2901107
A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-6.
PUB | DOI
 
[33]
2014 | Conference Paper | PUB-ID: 2681323
Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications
Sabena D, Sterpone L, Schölzel M, Koal T, Vierhaus HT, Wong S, Glein R, Rittner F, Stender C, Porrmann M, Hagemeyer J (2014)
In: Proceedings of 19th IEEE European Test Symposium (ETS). 175-182.
PUB | DOI
 
[32]
2014 | Conference Paper | PUB-ID: 2698930
A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, Vor dem Berge M, Kiesel T, Christmann W (2014)
In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014. IEEE: 146-153.
PUB | DOI
 
[31]
2014 | Conference Paper | PUB-ID: 2698999
Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems
Sorrenti D, Cozzi D, Korf S, Cassano L, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the 17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Amsterdam, The Netherlands.
PUB | DOI
 
[30]
2014 | Conference Paper | PUB-ID: 2681362
An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems
Cassano L, Cozzi D, Jungewelter D, Korf S, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the DTIS 2014, 9th International conference on Design & Technology of Integrated Systems in Nanoscale Era, Santorini , Greece.
PUB | DOI
 
[29]
2014 | Conference Paper | PUB-ID: 2699005
AXI-based SpaceFibre IP CORE Implementation
Cozzi D, Jungewelter D, Kleibrink D, Korf S, Hagemeyer J, Porrmann M, Ilstad J (2014)
Presented at the 6th International SpaceWire Conference, Athens, Greece.
PUB | DOI
 
[28]
2013 | Conference Paper | PUB-ID: 2681289
Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience
Desogus M, Sterpone L, Porrmann M, Hagemeyer J, Illstad J (2013)
In: RADECS proceedings., 2. IEEE / Institute of Electrical and Electronics Engineers: 13-16.
PUB
 
[27]
2013 | Conference Paper | PUB-ID: 2681304
Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture
Sterpone L, Sabena D, Ullah A, Porrmann M, Hagemeyer J, Ilstad J (2013)
In: Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on. 184-188.
PUB | DOI
 
[26]
2013 | Journal Article | PUB-ID: 2622226
A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing
Sterpone L, Porrmann M, Hagemeyer J (2013)
IEEE Transactions on Computers 62(8): 1508-1525.
PUB | DOI | WoS
 
[25]
2013 | Conference Paper | PUB-ID: 2576115
Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme
Korf S, Sievers G, Ax J, Cozzi D, Jungeblut T, Hagemeyer J, Porrmann M, Rückert U (2013)
In: Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme. HNI-Verlagsschriftenreihe. 79-90.
PUB | PDF
 
[24]
2013 | Conference Paper | PUB-ID: 2576042
On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems
Cassano L, Cozzi D, Korf S, Hagemeyer J, Porrmann M, Sterpone L (2013)
In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013. Piscataway, NJ: IEEE: 717-720.
PUB | DOI
 
[23]
2012 | Conference Paper | PUB-ID: 2559365
Optimizing inter-FPGA communication by automatic channel adaptation
Romoth J, Jungewelter D, Hagemeyer J, Porrmann M, Rückert U (2012)
In: Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on. 1-7.
PUB | DOI
 
[22]
2012 | Conference Paper | PUB-ID: 2517354
A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing
Hagemeyer J, Hilgenstein A, Jungewelter D, Cozzi D, Felicetti C, Rückert U, Korf S, Köster M, Margaglia F, Porrmann M, Dittmann F, et al. (2012)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems., (AHS-2012). 9-16.
PUB
 
[21]
2011 | Conference Abstract | PUB-ID: 2494497
Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications
Köster M, Hagemeyer J, Margaglia F, Porrmann M, Dittmann F, Ditze M, Sterpone L, Harris J, Ilstad J (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[20]
2011 | Conference Paper | PUB-ID: 2493819
Analysis of SEU Effects in Partially Reconfigurable SoPCs.
Sterpone L, Margaglia F, Köster M, Hagemeyer J, Porrmann M (2011)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011). 129-136.
PUB | DOI
 
[19]
2011 | Conference Paper | PUB-ID: 2494507
Fast Design-space Exploration with FPGA Cluster
Romoth J, Hagemeyer J, Porrmann M, Rückert U (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[18]
2011 | Conference Paper | PUB-ID: 2493823
Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.
Grawinkel M, Schäfers T, Brinkmann A, Hagemeyer J, Porrmann M (2011)
In: MASCOTS2011 The 19th Annual Meeting of the IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems. 297-306.
PUB | DOI
 
[17]
2011 | Conference Paper | PUB-ID: 2286173
Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs
Korf S, Cozzi D, Koester M, Hagemeyer J, Porrmann M, Rückert U, Santambrogio MD (2011)
In: Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on. 125-132.
PUB
 
[16]
2010 | Conference Paper | PUB-ID: 2472693
RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing
Porrmann M, Hagemeyer J, Pohl C, Romoth J, Strugholtz M (2010)
In: Parallel Computing: From Multicores and GPU's to Petascale, Advances in Parallel Computing., 19. IOS press: 592-599.
PUB | PDF
 
[15]
2010 | Conference Paper | PUB-ID: 2493826
Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.
Dittmann F, Linke M, Hagemeyer J, Köster M, Lallet J, Pohl C, Porrmann M, Harris J, Ilstad J (2010)
In: Proceedings of the International SpaceWire Conference 2010. 193-196.
PUB
 
[14]
2010 | Journal Article | PUB-ID: 2145423
Design Optimizations for Tiled Partially Reconfigurable Systems
Koester M, Luk W, Hagemeyer J, Porrmann M, Rückert U (2010)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19(6): 1048-1061.
PUB | DOI | WoS
 
[13]
2010 | Patent | PUB-ID: 2494087
Mehrprozessor-Computersystem
Christmann W, Strugholtz M, Hagemeyer J, Porrmann M (2010) .
PUB
 
[12]
2009 | Conference Paper | PUB-ID: 2144891
FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications
Paiz C, Pohl C, Radkowski R, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia: 372-375.
PUB | DOI
 
[11]
2009 | Conference Paper | PUB-ID: 2472678
Rapid Prototyping of Next-Generation Multiprocessor SoCs
Porrmann M, Hagemeyer J, Romoth J, Strugholtz M (2009)
In: Proceedings of Semiconductor Conference Dresden, SCD 2009. Dresden, Germany.
PUB
 
[10]
2009 | Conference Paper | PUB-ID: 2144880
Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks
Pohl C, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Sydney, Australia: 368-371.
PUB | DOI
 
[9]
2009 | Conference Paper | PUB-ID: 2144843
FPGA-Based Realization of Self-Optimizing Drive-Controllers
Paiz C, Hagemeyer J, Pohl C, Porrmann M, Rückert U, Schulz B, Peters W, Böcker J (2009)
In: the 35th Annual Conference of the IEEE Industrial Electronics Society (IECON 2009). 2868-2873.
PUB | PDF | DOI
 
[8]
2009 | Conference Paper | PUB-ID: 2472673
Design Optimizations to Improve Placeability of Partial Reconfiguration Modules
Koester M, Luk W, Hagemeyer J, Porrmann M (2009)
In: Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009). ACM Press.
PUB | DOI
 
[7]
2009 | Conference Paper | PUB-ID: 2472686
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems
Grassi PR, Santambrogio M, Hagemeyer J, Pohl C, Porrmann M (2009)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '09). Las Vegas, USA: 174-180.
PUB
 
[6]
2008 | Conference Paper | PUB-ID: 2472725
Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures
Hagemeyer J, Koester M, Porrmann M (2008)
In: 1. GI/ITG KuVS Fachgespräch Virtualisierung. Heinz Nixdorf Institut, Universität Paderborn.
PUB
 
[5]
2007 | Conference Paper | PUB-ID: 2472738
Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proc. of the Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA '07). Las Vegas, USA.
PUB
 
[4]
2007 | Conference Paper | PUB-ID: 2472729
Run-Time Reconfiguration of FPGA-Based Drive Controllers
Schulz B, Paiz C, Hagemeyer J, Mathapati S, Porrmann M, Böcker J (2007)
In: European Conference on Power Electronics and Applications (EPE 2007). Aalborg, Denmark.
PUB | DOI
 
[3]
2007 | Conference Paper | PUB-ID: 2472748
INDRA – Integrated Design Flow for Reconfigurable Architectures
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth.
PUB
 
[2]
2007 | Conference Paper | PUB-ID: 2472743
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). Amsterdam, Netherlands: 331-338.
PUB | DOI
 
[1]
2006 | Conference Paper | PUB-ID: 2473942
Dedicated Module Access in Dynamically Reconfigurable Systems
Hagemeyer J, Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS).
PUB | DOI
 

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46 Data Publications

Mark all

[46]
2017 | Journal Article | PUB-ID: 2909430
FPGA-based Multi-Robot Tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2017)
Journal of Parallel and Distributed Computing 107: 146-161.
PUB | DOI
 
[45]
2017 | Journal Article | PUB-ID: 2912818
M2DC – Modular Microserver DataCentre with heterogeneous hardware
Oleksiak A, Kierzynka M, Piatek W, Agosta G, Barenghi A, Porrmann M, Hagemeyer J, Griessl R, Lachmair J, Peykanu M, Tigges L, et al. (2017)
Microprocessors and Microsystems 52: 117-130.
PUB | DOI
 
[44]
2017 | Conference Paper | PUB-ID: 2909044
From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining
Lachmair J, Mieth T, Griessl R, Hagemeyer J, Porrmann M (2017)
In: International Joint Conference on Neural Networks (IJCNN 2017). 4299-4308.
PUB
 
[43]
2017 | Conference Paper | PUB-ID: 2912815
Reconfigurable Vision Processing System for Player Tracking in Indoor Sports
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (Accepted)
In: Conference on Design and Architectures for Signal and Image Processing (DASIP 2017).
PUB
 
[42]
2017 | Conference Paper | PUB-ID: 2909584
M2DC: Modular Microserver Datacentre with Heterogeneous Hardware
Oleksiak A, Kierzynka M, Piatek W, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, et al. (2017)
Presented at the Energy-efficient Servers for Cloud and Edge Computing 2017 Workshop (ENeSCE 2017) - co-located with HiPEAC 2017, Stockholm, Sweden.
PUB
 
[41]
2016 | Conference Abstract | PUB-ID: 2909602
FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers
Griessl R, Peykanu M, Tigges L, Hagemeyer J, Porrmann M (2016)
Presented at the Workshop "Reconfigurable Computing — From Embedded Systems to Reconfigurable Hyperscale Servers" co-located with the International Conference on Field-Programmable Logic and Applications (FPL 2016), Lausanne, Switzerland.
PUB
 
[40]
2016 | Journal Article | PUB-ID: 2908973
OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems
Cozzi D, Korf S, Cassano L, Hagemeyer J, Domenici A, Bernardeschi C, Porrmann M, Sterpone L (2016)
IEEE Transactions on Emerging Topics in Computing PP(99): 1-1.
PUB | DOI
 
[39]
2016 | Conference Paper | PUB-ID: 2908974
Data centres for IoT applications: The M2DC approach (Invited paper)
Oleksiak A, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, Tigges L, Christmann W, vor dem Berge M, Krupop S, Cudennec L, Cecowski M, et al. (2016)
In: 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS). 293-299.
PUB | DOI
 
[38]
2016 | Conference Paper | PUB-ID: 2908980
The M2DC Project: Modular Microserver DataCentre
Cecowski M, Agosta G, Oleksiak A, Kierzynka M, vor dem Berge M, Christmann W, Krupop S, Porrmann M, Hagemeyer J, Griessl R, Peykanu M, et al. (2016)
In: 2016 Euromicro Conference on Digital System Design (DSD). Institute of Electrical and Electronics Engineers (IEEE).
PUB | DOI
 
[37]
2016 | Journal Article | PUB-ID: 2903257
Energy Efficiency of Sequence Alignment Tools - Software and Hardware Perspectives
Kierzynka M, Kosmann L, vor dem Berge M, Krupop S, Hagemeyer J, Griessl R, Peykanu M, Oleksiak A (2016)
Future Generation Computer Systems 67: 455-465.
PUB | PDF | DOI | WoS
 
[36]
2015 | Conference Paper | PUB-ID: 2902039
FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, vor dem Berge M, Kosmann L, Knocke P, Kierzynka M, Oleksiak A (2015)
Presented at the First International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC‘15), held in conjunction with Supercomputing 2015, Austin Texas, USA.
PUB | PDF
 
[35]
2015 | Conference Paper | PUB-ID: 2901108
FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking
Irwansyah A, Ibraheem OW, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-8.
PUB | DOI
 
[34]
2015 | Conference Paper | PUB-ID: 2901107
A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms
Ibraheem OW, Irwansyah A, Hagemeyer J, Porrmann M, Rückert U (2015)
In: ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE: 1-6.
PUB | DOI
 
[33]
2014 | Conference Paper | PUB-ID: 2681323
Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications
Sabena D, Sterpone L, Schölzel M, Koal T, Vierhaus HT, Wong S, Glein R, Rittner F, Stender C, Porrmann M, Hagemeyer J (2014)
In: Proceedings of 19th IEEE European Test Symposium (ETS). 175-182.
PUB | DOI
 
[32]
2014 | Conference Paper | PUB-ID: 2698930
A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters
Griessl R, Peykanu M, Hagemeyer J, Porrmann M, Krupop S, Vor dem Berge M, Kiesel T, Christmann W (2014)
In: Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014. IEEE: 146-153.
PUB | DOI
 
[31]
2014 | Conference Paper | PUB-ID: 2698999
Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems
Sorrenti D, Cozzi D, Korf S, Cassano L, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the 17th IEEE Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems, Amsterdam, The Netherlands.
PUB | DOI
 
[30]
2014 | Conference Paper | PUB-ID: 2681362
An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems
Cassano L, Cozzi D, Jungewelter D, Korf S, Hagemeyer J, Porrmann M, Bernadeschi C (2014)
Presented at the DTIS 2014, 9th International conference on Design & Technology of Integrated Systems in Nanoscale Era, Santorini , Greece.
PUB | DOI
 
[29]
2014 | Conference Paper | PUB-ID: 2699005
AXI-based SpaceFibre IP CORE Implementation
Cozzi D, Jungewelter D, Kleibrink D, Korf S, Hagemeyer J, Porrmann M, Ilstad J (2014)
Presented at the 6th International SpaceWire Conference, Athens, Greece.
PUB | DOI
 
[28]
2013 | Conference Paper | PUB-ID: 2681289
Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience
Desogus M, Sterpone L, Porrmann M, Hagemeyer J, Illstad J (2013)
In: RADECS proceedings., 2. IEEE / Institute of Electrical and Electronics Engineers: 13-16.
PUB
 
[27]
2013 | Conference Paper | PUB-ID: 2681304
Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture
Sterpone L, Sabena D, Ullah A, Porrmann M, Hagemeyer J, Ilstad J (2013)
In: Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on. 184-188.
PUB | DOI
 
[26]
2013 | Journal Article | PUB-ID: 2622226
A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing
Sterpone L, Porrmann M, Hagemeyer J (2013)
IEEE Transactions on Computers 62(8): 1508-1525.
PUB | DOI | WoS
 
[25]
2013 | Conference Paper | PUB-ID: 2576115
Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme
Korf S, Sievers G, Ax J, Cozzi D, Jungeblut T, Hagemeyer J, Porrmann M, Rückert U (2013)
In: Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme. HNI-Verlagsschriftenreihe. 79-90.
PUB | PDF
 
[24]
2013 | Conference Paper | PUB-ID: 2576042
On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems
Cassano L, Cozzi D, Korf S, Hagemeyer J, Porrmann M, Sterpone L (2013)
In: Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013. Piscataway, NJ: IEEE: 717-720.
PUB | DOI
 
[23]
2012 | Conference Paper | PUB-ID: 2559365
Optimizing inter-FPGA communication by automatic channel adaptation
Romoth J, Jungewelter D, Hagemeyer J, Porrmann M, Rückert U (2012)
In: Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on. 1-7.
PUB | DOI
 
[22]
2012 | Conference Paper | PUB-ID: 2517354
A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing
Hagemeyer J, Hilgenstein A, Jungewelter D, Cozzi D, Felicetti C, Rückert U, Korf S, Köster M, Margaglia F, Porrmann M, Dittmann F, et al. (2012)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems., (AHS-2012). 9-16.
PUB
 
[21]
2011 | Conference Abstract | PUB-ID: 2494497
Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications
Köster M, Hagemeyer J, Margaglia F, Porrmann M, Dittmann F, Ditze M, Sterpone L, Harris J, Ilstad J (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[20]
2011 | Conference Paper | PUB-ID: 2493819
Analysis of SEU Effects in Partially Reconfigurable SoPCs.
Sterpone L, Margaglia F, Köster M, Hagemeyer J, Porrmann M (2011)
In: Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011). 129-136.
PUB | DOI
 
[19]
2011 | Conference Paper | PUB-ID: 2494507
Fast Design-space Exploration with FPGA Cluster
Romoth J, Hagemeyer J, Porrmann M, Rückert U (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
PUB
 
[18]
2011 | Conference Paper | PUB-ID: 2493823
Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.
Grawinkel M, Schäfers T, Brinkmann A, Hagemeyer J, Porrmann M (2011)
In: MASCOTS2011 The 19th Annual Meeting of the IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems. 297-306.
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[17]
2011 | Conference Paper | PUB-ID: 2286173
Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs
Korf S, Cozzi D, Koester M, Hagemeyer J, Porrmann M, Rückert U, Santambrogio MD (2011)
In: Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on. 125-132.
PUB
 
[16]
2010 | Conference Paper | PUB-ID: 2472693
RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing
Porrmann M, Hagemeyer J, Pohl C, Romoth J, Strugholtz M (2010)
In: Parallel Computing: From Multicores and GPU's to Petascale, Advances in Parallel Computing., 19. IOS press: 592-599.
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[15]
2010 | Conference Paper | PUB-ID: 2493826
Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.
Dittmann F, Linke M, Hagemeyer J, Köster M, Lallet J, Pohl C, Porrmann M, Harris J, Ilstad J (2010)
In: Proceedings of the International SpaceWire Conference 2010. 193-196.
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[14]
2010 | Journal Article | PUB-ID: 2145423
Design Optimizations for Tiled Partially Reconfigurable Systems
Koester M, Luk W, Hagemeyer J, Porrmann M, Rückert U (2010)
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19(6): 1048-1061.
PUB | DOI | WoS
 
[13]
2010 | Patent | PUB-ID: 2494087
Mehrprozessor-Computersystem
Christmann W, Strugholtz M, Hagemeyer J, Porrmann M (2010) .
PUB
 
[12]
2009 | Conference Paper | PUB-ID: 2144891
FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications
Paiz C, Pohl C, Radkowski R, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia: 372-375.
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[11]
2009 | Conference Paper | PUB-ID: 2472678
Rapid Prototyping of Next-Generation Multiprocessor SoCs
Porrmann M, Hagemeyer J, Romoth J, Strugholtz M (2009)
In: Proceedings of Semiconductor Conference Dresden, SCD 2009. Dresden, Germany.
PUB
 
[10]
2009 | Conference Paper | PUB-ID: 2144880
Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks
Pohl C, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09). Sydney, Australia: 368-371.
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[9]
2009 | Conference Paper | PUB-ID: 2144843
FPGA-Based Realization of Self-Optimizing Drive-Controllers
Paiz C, Hagemeyer J, Pohl C, Porrmann M, Rückert U, Schulz B, Peters W, Böcker J (2009)
In: the 35th Annual Conference of the IEEE Industrial Electronics Society (IECON 2009). 2868-2873.
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[8]
2009 | Conference Paper | PUB-ID: 2472673
Design Optimizations to Improve Placeability of Partial Reconfiguration Modules
Koester M, Luk W, Hagemeyer J, Porrmann M (2009)
In: Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009). ACM Press.
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[7]
2009 | Conference Paper | PUB-ID: 2472686
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems
Grassi PR, Santambrogio M, Hagemeyer J, Pohl C, Porrmann M (2009)
In: Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '09). Las Vegas, USA: 174-180.
PUB
 
[6]
2008 | Conference Paper | PUB-ID: 2472725
Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures
Hagemeyer J, Koester M, Porrmann M (2008)
In: 1. GI/ITG KuVS Fachgespräch Virtualisierung. Heinz Nixdorf Institut, Universität Paderborn.
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[5]
2007 | Conference Paper | PUB-ID: 2472738
Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proc. of the Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA '07). Las Vegas, USA.
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[4]
2007 | Conference Paper | PUB-ID: 2472729
Run-Time Reconfiguration of FPGA-Based Drive Controllers
Schulz B, Paiz C, Hagemeyer J, Mathapati S, Porrmann M, Böcker J (2007)
In: European Conference on Power Electronics and Applications (EPE 2007). Aalborg, Denmark.
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[3]
2007 | Conference Paper | PUB-ID: 2472748
INDRA – Integrated Design Flow for Reconfigurable Architectures
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth.
PUB
 
[2]
2007 | Conference Paper | PUB-ID: 2472743
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS
Hagemeyer J, Kettelhoit B, Koester M, Porrmann M (2007)
In: Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL). Amsterdam, Netherlands: 331-338.
PUB | DOI
 
[1]
2006 | Conference Paper | PUB-ID: 2473942
Dedicated Module Access in Dynamically Reconfigurable Systems
Hagemeyer J, Kettelhoit B, Porrmann M (2006)
In: Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS).
PUB | DOI
 

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