High level estimation of the area and power consumption of on-chip interconnects
Langen D, Brinkmann A, Rückert U (2000)
In: ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International. IEEE: 297-301.
Konferenzbeitrag
| Veröffentlicht | Englisch
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Autor*in
Langen, D.;
Brinkmann, A.;
Rückert, UlrichUniBi
Abstract / Bemerkung
This paper addresses the problem of estimating
the power and area consumption of on-chip interconnects
for standard cell ASIC processes. We introduce a set
of analytic investigations on buses, crossbar switches, and
multiplexors. Furthermore we prove the accuracy of the
results by comparing them with gate-level powerestimations
on a double metal 0.6μm CMOS technology.
Stichworte
application specific integrated circuits;
CMOS digital integrated circuits;
power consumption;
standard cell ASIC processes;
onchip interconnects;
double metal CMOS technology;
multiplexors;
high level estimation;
crossbar switches;
buses;
integrated circuit modelling;
integrated circuit layout;
estimation theory;
integrated circuit interconnections;
area consumption;
0.6 micron
Erscheinungsjahr
2000
Titel des Konferenzbandes
ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International
Seite(n)
297-301
ISBN
0780365984
Page URI
https://pub.uni-bielefeld.de/record/2286370
Zitieren
Langen D, Brinkmann A, Rückert U. High level estimation of the area and power consumption of on-chip interconnects. In: ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International. IEEE; 2000: 297-301.
Langen, D., Brinkmann, A., & Rückert, U. (2000). High level estimation of the area and power consumption of on-chip interconnects. ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International, 297-301. IEEE. https://doi.org/10.1109/ASIC.2000.880753
Langen, D., Brinkmann, A., and Rückert, Ulrich. 2000. “High level estimation of the area and power consumption of on-chip interconnects”. In ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International, 297-301. IEEE.
Langen, D., Brinkmann, A., and Rückert, U. (2000). “High level estimation of the area and power consumption of on-chip interconnects” in ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International (IEEE), 297-301.
Langen, D., Brinkmann, A., & Rückert, U., 2000. High level estimation of the area and power consumption of on-chip interconnects. In ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International. IEEE, pp. 297-301.
D. Langen, A. Brinkmann, and U. Rückert, “High level estimation of the area and power consumption of on-chip interconnects”, ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International, IEEE, 2000, pp.297-301.
Langen, D., Brinkmann, A., Rückert, U.: High level estimation of the area and power consumption of on-chip interconnects. ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International. p. 297-301. IEEE (2000).
Langen, D., Brinkmann, A., and Rückert, Ulrich. “High level estimation of the area and power consumption of on-chip interconnects”. ASIC/SOC Conference, 2000. Proceedings. 13th Annual IEEE International. IEEE, 2000. 297-301.
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