A Scalable Processor Array for Self-Organizing Feature Maps
Rüping S, Rückert U (1996)
In: Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro). Lausanne, Switzerland: IEEE Computer Society Press.
Konferenzbeitrag
| Veröffentlicht | Englisch
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Autor*in
Rüping, Stefan;
Rückert, UlrichUniBi
Abstract / Bemerkung
Selforganizing Feature Maps (SOFMs) can be applied for data analysis, controlling problems and pattern matching. In many cases the requirements of a system using these maps are high performance and small physical size. This leads to the necessity of custom chip designs. In this paper two chips are presented, that realize a scalable processor array for self-organizing feature maps. First the design and test results of a single processor chip are described. Based on these results a second chip has been developed implementing a 5 by 5 array of elements. Each processor has on-chip memory to store 64 weights of 8 bit. The calculation unit has an internal precision of 14 bit. An input pattern can have 64 vector components of 8 bit. In order to achieve high speed, all elements work in parallel. Several of this chips can be cascaded to larger map sizes in a system
Erscheinungsjahr
1996
Titel des Konferenzbandes
Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro)
ISBN
0818673737
Page URI
https://pub.uni-bielefeld.de/record/2285570
Zitieren
Rüping S, Rückert U. A Scalable Processor Array for Self-Organizing Feature Maps. In: Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro). Lausanne, Switzerland: IEEE Computer Society Press; 1996.
Rüping, S., & Rückert, U. (1996). A Scalable Processor Array for Self-Organizing Feature Maps. Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro) Lausanne, Switzerland: IEEE Computer Society Press. https://doi.org/10.1109/MNNFS.1996.493804
Rüping, Stefan, and Rückert, Ulrich. 1996. “A Scalable Processor Array for Self-Organizing Feature Maps”. In Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro). Lausanne, Switzerland: IEEE Computer Society Press.
Rüping, S., and Rückert, U. (1996). “A Scalable Processor Array for Self-Organizing Feature Maps” in Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro) (Lausanne, Switzerland: IEEE Computer Society Press).
Rüping, S., & Rückert, U., 1996. A Scalable Processor Array for Self-Organizing Feature Maps. In Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro). Lausanne, Switzerland: IEEE Computer Society Press.
S. Rüping and U. Rückert, “A Scalable Processor Array for Self-Organizing Feature Maps”, Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro), Lausanne, Switzerland: IEEE Computer Society Press, 1996.
Rüping, S., Rückert, U.: A Scalable Processor Array for Self-Organizing Feature Maps. Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro). IEEE Computer Society Press, Lausanne, Switzerland (1996).
Rüping, Stefan, and Rückert, Ulrich. “A Scalable Processor Array for Self-Organizing Feature Maps”. Proceedings of the 6th International Conference on Microelectronics for Neural Networks and Fuzzy Systems (MicroNeuro). Lausanne, Switzerland: IEEE Computer Society Press, 1996.
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