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23 Publikationen

2018 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2918788 OA
M. Kaiser, et al., “Accelerating Hamming Distance Comparisons for Locality Sensitive Hashing (LSH) using FPGAs”, 12th CeBiTec Symposium - Big Data in Medicine and Biotechnology - Abstract Book, vol. 12, Bielefeld: 2018, pp.48-49.
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2016 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2900943
D. Langenkämper, et al., “Comparison of Acceleration Techniques for Selected Low-Level Bioinformatics Operations”, Frontiers in Genetics, vol. 7, 2016, : 5.
PUB | DOI | WoS | PubMed | Europe PMC
 
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901107
O.W. Ibraheem, et al., “A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms”, ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on, IEEE, 2015, pp.1-6.
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2014 | Bielefelder E-Dissertation | PUB-ID: 2652142 OA
C. Puttmann, Ressourceneffiziente Hardware-Software-Kombinationen für Kryptographie mit elliptischen Kurven, Bielefeld: Universität Bielefeld, 2014.
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2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2622226
L. Sterpone, M. Porrmann, and J. Hagemeyer, “A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing”, IEEE Transactions on Computers, vol. 62, 2013, pp. 1508-1525.
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2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681304
L. Sterpone, et al., “Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture”, Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on, 2013, pp.184-188.
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2012 | Bielefelder E-Dissertation | PUB-ID: 2547735 OA
H.-P. Loeb, Application-driven exploration of a programmable platform for Wireless LAN, Bielefeld: Universität Bielefeld, 2012.
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2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2559365
J. Romoth, et al., “Optimizing inter-FPGA communication by automatic channel adaptation”, Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on, 2012, pp.1-7.
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2012 | Bielefelder E-Dissertation | PUB-ID: 2463253 OA
C.V. Paiz Gatica, Dynamically reconfigurable hardware for embedded control systems, Bielefeld: Universität, 2012.
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2011 | Bielefelder E-Dissertation | PUB-ID: 2407551 OA
T. Jungeblut, Entwurfsraumexploration ressourceneffizienter VLIW-Prozessoren, Bielefeld: Universität Bielefeld, 2011.
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2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286173
S. Korf, et al., “Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs”, Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on, 2011, pp.125-132.
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2009 | Dissertation | PUB-ID: 1926542
T. Köhler, Analog and Digital Hardware Implementations of Biologically Inspired Algorithms in Mobile Robotics, Tönning: Der Andere Verlag, 2009.
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2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285993
V. Rana, et al., “Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux”, Proceedings of the 21st International Parallel and Distributed Processing Symposium (IPDPS 2007) - Reconfigurable Architecture Workshop (RAW), IEEE Computer Society., 2007.
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2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286362
C. Puttmann, et al., “GigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors”, Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on, 2007, pp.495-502.
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2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286250
T. Kaulmann, D. Dikmen, and U. Rückert, “A Digital Framework for Pulse Coded Neural Network Hardware with Bit-Serial Operation”, Hybrid Intelligent Systems, 2007. HIS 2007. 7th International Conference on, 2007, pp.302-307.
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2006 | Bielefelder E-Dissertation | PUB-ID: 2306473 OA
D. Meyners, Herstellung und Charakterisierung von Logikarrays mit ultrakleinen magnetischen Tunnelelementen, Bielefeld (Germany): Bielefeld University, 2006.
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2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286356
H. Kalte, M. Porrmann, and U. Rückert, “System-on-programmable-chip approach enabling online fine-grained 1D-placement”, Parallel and Distributed Processing Symposium, 2004. Proceedings. 18th International, 2004, pp.141.
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2004 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286138
C. Pohl, et al., “gNBX - reconfigurable hardware acceleration of self-organizing maps”, Field-Programmable Technology, 2004. Proceedings. 2004 IEEE International Conference on, 2004, pp.97-104.
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2003 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 1611555
G. Baum, et al., “The COMPASS RICH-1 read-out system”, Nucl.Instrum.Meth. A, vol. 502, 2003, pp. 246-250.
PUB | DOI | WoS | Inspire
 
2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286322
H. Kalte, et al., “Dynamically reconfigurable system-on-programmable-chip”, Parallel, Distributed and Network-based Processing, 2002. Proceedings. 10th Euromicro Workshop on, 2002, pp.235-242.
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