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29 Publikationen

2018 | Kurzbeitrag Konferenz / Poster | PUB-ID: 2931674
Hermes, L., Dürr, V., & Hoinville, T., 2018. Toward a biomimetic Johnston's organ for touch localization. Proceedings of the German Zoological Society, : NB 9.
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2016 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2908973
Cozzi, D., et al., 2016. OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems. IEEE Transactions on Emerging Topics in Computing, PP(99), p 1-1.
PUB | DOI | WoS
 
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901107
Ibraheem, O.W., et al., 2015. A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms. In ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on. IEEE, pp. 1-6.
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2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681304
Sterpone, L., et al., 2013. Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture. In Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on. pp. 184-188.
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2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2559365
Romoth, J., et al., 2012. Optimizing inter-FPGA communication by automatic channel adaptation. In Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on. pp. 1-7.
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2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286173
Korf, S., et al., 2011. Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs. In Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on. pp. 125-132.
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2008 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 1587078
Schürmann, K.-B., & Stoye, J., 2008. Counting suffix arrays and strings. THEORETICAL COMPUTER SCIENCE, 395(2-3), p 220-234.
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2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285993
Rana, V., et al., 2007. Partial Dynamic Reconfiguration in a Multi-FPGA Clustered Architecture Based on Linux. In Proceedings of the 21st International Parallel and Distributed Processing Symposium (IPDPS 2007) - Reconfigurable Architecture Workshop (RAW), IEEE Computer Society.
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2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286362
Puttmann, C., et al., 2007. GigaNoC - A Hierarchical Network-on-Chip for Scalable Chip-Multiprocessors. In Digital System Design Architectures, Methods and Tools, 2007. DSD 2007. 10th Euromicro Conference on. pp. 495-502.
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2007 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 1595253
Schürmann, K.-B., & Stoye, J., 2007. An incomplex algorithm for fast suffix array construction. SOFTWARE-PRACTICE & EXPERIENCE, 37(3), p 309-329.
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