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558 Publikationen

2002 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2145340
A. Heittmann and U. Rückert, “Mixed Mode VLSI Implementation of a Neural Associative Memory”, Analog Integrated Circuits and Signal Processing, vol. 30, 2002, pp. 159-172.
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2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288581
U. Rückert and M. Schmidt, “Neural Associative Memory For Content-Based Information Retrieval”, Proceedings of the First International Conference on Intelligent Computing and Information Systems, ICICIS, Cairo, Egypt: 2002, pp.2-32.
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2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288603 OA
M. Porrmann, et al., “A Reconfigurable SOM Hardware Accelerator”, 10th European Symposium on Artificial Neural Networks, 2002.
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2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286057
D. Langen and U. Rückert, “Extending scaling theory by adequately considering velocity saturation”, ASIC/SOC Conference, 2002. 15th Annual IEEE International, IEEE, 2002, pp.145-149.
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2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288565 OA
D. Langen, et al., “Implementation of a RISC Processor Core for SoC Designs – FPGA Prototype vs. ASIC Implementation”, Proceedings of the IEEE-Workshop: Heterogeneous reconfigurable Systems on Chip (SoC), Hamburg, Germany: 2002.
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2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2288589
M. Porrmann, et al., “Dynamically Reconfigurable Hardware – A New Perspective for Neural Network Implementations”, Proceedings of the International Conference on Field Programmable Logic and Applications (FPL2002), Montpellier, France: Springer Berlin Heidelberg, 2002, pp.1048-1057.
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2002 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2285618
U. Rückert, “ULSI Architectures for Artificial Neural Networks”, IEEE Micro, vol. 22, 2002, pp. 10-19.
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2002 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2285620 OA
M. Schäfer, et al., “Simulation of Spiking Neural Networks – Architectures and Implementations”, Neurocomputing, vol. 48, 2002, pp. 647-679.
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2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285896
M. Porrmann, et al., “Implementation of artificial neural networks on a reconfigurable hardware accelerator”, Parallel, Distributed and Network-based Processing, 2002. Proceedings. 10th Euromicro Workshop on, IEEE Comput. Soc, 2002, pp.243-250.
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2002 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2285966
A. Brinkmann, et al., “On-chip interconnects for next generation system-on-chips”, ASIC/SOC Conference, 2002. 15th Annual IEEE International, IEEE, 2002, pp.211-215.
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