Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI

Sievers G, Ax J, Kucza N, Flasskamp M, Jungeblut T, Kelly W, Porrmann M, Rückert U (2015)
In: 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE: 1925-1928.

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Abstract
Embedded many-core architectures contain dozens to hundreds of CPU cores that are connected via a highly scalable NoC interconnect. Our Multiprocessor-System-on-Chip CoreVA-MPSoC combines the advantages of tightly coupled bus-based communication with the scalability of NoC approaches by adding a CPU cluster as an additional level of hierarchy. In this work, we analyze different cluster interconnect implementations with 8 to 32 CPUs and compare them in terms of resource requirements and performance to hierarchical NoCs approaches. Using 28 nm FD-SOI technology the area requirement for 32 CPUs and AXI crossbar is 5.59 mm2 including 23.61% for the interconnect at a clock frequency of 830 MHz. In comparison, a hierarchical MPSoC with 4 CPU cluster and 8 CPUs in each cluster requires only 4.83 mm2 including 11.61% for the interconnect. To evaluate the performance, we use a compiler for streaming applications to map programs to the different MPSoC configurations. We use this approach for a design-space exploration to find the most efficient architecture and partitioning for an application.
Publishing Year
Conference
2015 IEEE International Symposium on Circuits & Systems (ISCAS)
Location
Lisbon, Portugal
Conference Date
2015-05-24 – 2015-04-27
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Sievers G, Ax J, Kucza N, et al. Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI. In: 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE; 2015: 1925-1928.
Sievers, G., Ax, J., Kucza, N., Flasskamp, M., Jungeblut, T., Kelly, W., Porrmann, M., et al. (2015). Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI. 2015 IEEE International Symposium on Circuits & Systems (ISCAS), 1925-1928.
Sievers, G., Ax, J., Kucza, N., Flasskamp, M., Jungeblut, T., Kelly, W., Porrmann, M., and Rückert, U. (2015). “Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI” in 2015 IEEE International Symposium on Circuits & Systems (ISCAS) (IEEE), 1925-1928.
Sievers, G., et al., 2015. Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI. In 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE, pp. 1925-1928.
G. Sievers, et al., “Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI”, 2015 IEEE International Symposium on Circuits & Systems (ISCAS), IEEE, 2015, pp.1925-1928.
Sievers, G., Ax, J., Kucza, N., Flasskamp, M., Jungeblut, T., Kelly, W., Porrmann, M., Rückert, U.: Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI. 2015 IEEE International Symposium on Circuits & Systems (ISCAS). p. 1925-1928. IEEE (2015).
Sievers, Gregor, Ax, Johannes, Kucza, Nils, Flasskamp, Martin, Jungeblut, Thorsten, Kelly, Wayne, Porrmann, Mario, and Rückert, Ulrich. “Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI”. 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE, 2015. 1925-1928.
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