Fast Design-space Exploration with FPGA Cluster

Romoth J, Hagemeyer J, Porrmann M, Rückert U (2011)
In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.

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Konferenzbeitrag | Veröffentlicht | Englisch
Abstract / Bemerkung
Clusters of FPGAs are a promising environment for prototyping and evaluation of new MPSoC architectures with a large number of parallel cores. The high complexity of both the MPSoC and the FPGA cluster pose many challenges for the designer [1]. Tools like Synopsys Certify can be used to automatically partition designs on systems with a fixed communication infrastructure, still they do not address the problem that minor changes in the design might require a whole rerun of the mapping procedure. For each FPGA the architecture mapping consists of synthesis, place & route, bitstream generation, and finally the FPGA configuration. While the configuration is done within milliseconds, synthesis, place & route, and bitstream generation easily take several hours to complete. Thus, the evaluation of different architectural variants becomes a very time-consuming task.
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Titel des Konferenzbandes
DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing
Konferenzort
Grenoble, France
Konferenzdatum
March 18
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Romoth J, Hagemeyer J, Porrmann M, Rückert U. Fast Design-space Exploration with FPGA Cluster. In: DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing. 2011.
Romoth, J., Hagemeyer, J., Porrmann, M., & Rückert, U. (2011). Fast Design-space Exploration with FPGA Cluster. DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing
Romoth, J., Hagemeyer, J., Porrmann, M., and Rückert, U. (2011). “Fast Design-space Exploration with FPGA Cluster” in DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
Romoth, J., et al., 2011. Fast Design-space Exploration with FPGA Cluster. In DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing.
J. Romoth, et al., “Fast Design-space Exploration with FPGA Cluster”, DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing, 2011.
Romoth, J., Hagemeyer, J., Porrmann, M., Rückert, U.: Fast Design-space Exploration with FPGA Cluster. DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing. (2011).
Romoth, Johannes, Hagemeyer, Jens, Porrmann, Mario, and Rückert, Ulrich. “Fast Design-space Exploration with FPGA Cluster”. DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing. 2011.
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