A Hardware-in-the-Loop Design Environment for FPGAs

Pohl C, Paiz C, Porrmann M (2008)
In: Design, Automation and Test in Europe (DATE), University Booth.

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Konferenzbeitrag | Veröffentlicht | Englisch
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Erscheinungsjahr
Titel des Konferenzbandes
Design, Automation and Test in Europe (DATE), University Booth
Konferenzort
Munich, Germany
Konferenzdatum
March 10 -14
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Pohl C, Paiz C, Porrmann M. A Hardware-in-the-Loop Design Environment for FPGAs. In: Design, Automation and Test in Europe (DATE), University Booth. 2008.
Pohl, C., Paiz, C., & Porrmann, M. (2008). A Hardware-in-the-Loop Design Environment for FPGAs. Design, Automation and Test in Europe (DATE), University Booth
Pohl, C., Paiz, C., and Porrmann, M. (2008). “A Hardware-in-the-Loop Design Environment for FPGAs” in Design, Automation and Test in Europe (DATE), University Booth.
Pohl, C., Paiz, C., & Porrmann, M., 2008. A Hardware-in-the-Loop Design Environment for FPGAs. In Design, Automation and Test in Europe (DATE), University Booth.
C. Pohl, C. Paiz, and M. Porrmann, “A Hardware-in-the-Loop Design Environment for FPGAs”, Design, Automation and Test in Europe (DATE), University Booth, 2008.
Pohl, C., Paiz, C., Porrmann, M.: A Hardware-in-the-Loop Design Environment for FPGAs. Design, Automation and Test in Europe (DATE), University Booth. (2008).
Pohl, Christopher, Paiz, Carlos, and Porrmann, Mario. “A Hardware-in-the-Loop Design Environment for FPGAs”. Design, Automation and Test in Europe (DATE), University Booth. 2008.

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