vMAGIC – Automatic Code Generation for VHDL

Pohl C, Fuest R, Porrmann M (2010)
newsletter edacentrum 2009: 1-9.

Journal Article | Published | English

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Automatic code generation is a standard method in software engineering, improving the code reliability as well as reducing the overall development time. In hardware engineering, automatic code generation is utilized within a number of development tools, the integrated code generation functionality, however, is not exposed to developers wishing to implement their own generators. In this paper, VHDL Manipulation and Generation Interface (vMAGIC), a Java library to read, manipulate, and write VHDL code is presented. The basic functionality as well as the designflow is described, stressing the advantages when designing with vMAGIC. Two real-world examples demonstrate the power of code generation in hardware engineering.
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Pohl C, Fuest R, Porrmann M. vMAGIC – Automatic Code Generation for VHDL. newsletter edacentrum. 2010;2009:1-9.
Pohl, C., Fuest, R., & Porrmann, M. (2010). vMAGIC – Automatic Code Generation for VHDL. newsletter edacentrum, 2009, 1-9.
Pohl, C., Fuest, R., and Porrmann, M. (2010). vMAGIC – Automatic Code Generation for VHDL. newsletter edacentrum 2009, 1-9.
Pohl, C., Fuest, R., & Porrmann, M., 2010. vMAGIC – Automatic Code Generation for VHDL. newsletter edacentrum, 2009, p 1-9.
C. Pohl, R. Fuest, and M. Porrmann, “vMAGIC – Automatic Code Generation for VHDL”, newsletter edacentrum, vol. 2009, 2010, pp. 1-9.
Pohl, C., Fuest, R., Porrmann, M.: vMAGIC – Automatic Code Generation for VHDL. newsletter edacentrum. 2009, 1-9 (2010).
Pohl, Christopher, Fuest, Ralf, and Porrmann, Mario. “vMAGIC – Automatic Code Generation for VHDL”. newsletter edacentrum 2009 (2010): 1-9.
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