A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS

Lütkemeier S, Kaulmann T, Rückert U (2009)
In: Semiconductor Conference Dresden. .

Conference Paper | Published | English

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Abstract
We have implemented a 32bit ALU operating at voltages from 115mV to 1V on a die area of 0.021mm² in 90nm bulk CMOS. The energy minimum of 0.45pJ/instruction is achieved at a supply voltage of 210mV with the ALUs operating at a clock frequency of 3MHz. A yield of 88.5% can be reported for a supply voltage of 200mV, and 75% for a supply voltage of 120mV without any body biasing applied. The ALUs have been implemented with an automated design flow and a custom standard cell library, optimized for sub-threshold operation.
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Lütkemeier S, Kaulmann T, Rückert U. A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS. In: Semiconductor Conference Dresden. 2009.
Lütkemeier, S., Kaulmann, T., & Rückert, U. (2009). A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS. Semiconductor Conference Dresden.
Lütkemeier, S., Kaulmann, T., and Rückert, U. (2009). “A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS” in Semiconductor Conference Dresden.
Lütkemeier, S., Kaulmann, T., & Rückert, U., 2009. A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS. In Semiconductor Conference Dresden.
S. Lütkemeier, T. Kaulmann, and U. Rückert, “A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS”, Semiconductor Conference Dresden, 2009.
Lütkemeier, S., Kaulmann, T., Rückert, U.: A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS. Semiconductor Conference Dresden. (2009).
Lütkemeier, Sven, Kaulmann, Tim, and Rückert, Ulrich. “A Sub-200mV 32bit ALU with 0.45pJ/instruction in 90nm CMOS”. Semiconductor Conference Dresden. 2009.
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