FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications

Paiz C, Pohl C, Radkowski R, Hagemeyer J, Porrmann M, Rückert U (2009)
In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia: 372-375.

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Abstract
This contribution presents a Hardware-in-the-Loop (HiL) design environment for FPGA-based systems. The presented tool-flow supports a two-stage verification process: A cycle-accurate HiL simulation using well-known simulation tools such as MATLAB/Simulink or Modelsim, and a real-time test using the target environment of the Design Under Test (DUT). The first stage allows an early verification of the DUT using a simulated environment, while the focus of the second stage is on monitoring internal states and I/Os of the DUT in operation, and on adjusting design parameters. All hardware and software interfaces required for both stages are generated individually and automatically by our tool-flow. The demo shows the benefits of using the presented HiL framework for applications targeting dynamic hardware reconfiguration. As an example, a twocontroller system for an inverted pendulum is presented, where either a real system or an FPGA-based model combined with an augmented reality 3D animation can be used.
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Paiz C, Pohl C, Radkowski R, Hagemeyer J, Porrmann M, Rückert U. FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications. In: Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia; 2009: 372-375.
Paiz, C., Pohl, C., Radkowski, R., Hagemeyer, J., Porrmann, M., & Rückert, U. (2009). FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09), 372-375.
Paiz, C., Pohl, C., Radkowski, R., Hagemeyer, J., Porrmann, M., and Rückert, U. (2009). “FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications” in Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09) (The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia), 372-375.
Paiz, C., et al., 2009. FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications. In Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia, pp. 372-375.
C. Paiz, et al., “FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications”, Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09), The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia: 2009, pp.372-375.
Paiz, C., Pohl, C., Radkowski, R., Hagemeyer, J., Porrmann, M., Rückert, U.: FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). p. 372-375. The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia (2009).
Paiz, Carlos, Pohl, Christopher, Radkowski, Rafael, Hagemeyer, Jens, Porrmann, Mario, and Rückert, Ulrich. “FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications”. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia, 2009. 372-375.
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