Design Space Exploration for Memory Subsystems of VLIW Architectures

Jungeblut T, Sievers G, Porrmann M, Rückert U (2010)
In: 5th IEEE International Conference on Networking, Architecture, and Storage. 377-385.

Conference Paper | Published | English

No fulltext has been uploaded

Abstract
In this work we present a design space exploration of the memory subsystem of our configurable CoreVA VLIW architecture. The development of resource efficient processor architectures is based on a two-stage tool flow using a high-level processor specification as a reference. We evaluate several memory configurations like one memory port or two memory ports, as well as different write-miss-allocation modes. Applications ranging from LTE protocol stack over baseband processing up to cryptography and multimedia are evaluated in terms of execution time and energy efficiency. Analyses have shown that the application specific configuration of the memory subsystem can improve energy by up to 25%. Our environment allows the rapid profiling and evaluation of algorithms to choose the most efficient configuration.
Publishing Year
Conference
NAS 2010
PUB-ID

Cite this

Jungeblut T, Sievers G, Porrmann M, Rückert U. Design Space Exploration for Memory Subsystems of VLIW Architectures. In: 5th IEEE International Conference on Networking, Architecture, and Storage. 2010: 377-385.
Jungeblut, T., Sievers, G., Porrmann, M., & Rückert, U. (2010). Design Space Exploration for Memory Subsystems of VLIW Architectures. 5th IEEE International Conference on Networking, Architecture, and Storage, 377-385.
Jungeblut, T., Sievers, G., Porrmann, M., and Rückert, U. (2010). “Design Space Exploration for Memory Subsystems of VLIW Architectures” in 5th IEEE International Conference on Networking, Architecture, and Storage 377-385.
Jungeblut, T., et al., 2010. Design Space Exploration for Memory Subsystems of VLIW Architectures. In 5th IEEE International Conference on Networking, Architecture, and Storage. pp. 377-385.
T. Jungeblut, et al., “Design Space Exploration for Memory Subsystems of VLIW Architectures”, 5th IEEE International Conference on Networking, Architecture, and Storage, 2010, pp.377-385.
Jungeblut, T., Sievers, G., Porrmann, M., Rückert, U.: Design Space Exploration for Memory Subsystems of VLIW Architectures. 5th IEEE International Conference on Networking, Architecture, and Storage. p. 377-385. (2010).
Jungeblut, Thorsten, Sievers, Gregor, Porrmann, Mario, and Rückert, Ulrich. “Design Space Exploration for Memory Subsystems of VLIW Architectures”. 5th IEEE International Conference on Networking, Architecture, and Storage. 2010. 377-385.
This data publication is cited in the following publications:
This publication cites the following data publications:

Export

0 Marked Publications

Open Data PUB

Search this title in

Google Scholar