4 Publikationen

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[4]
2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905 OA
J. Ax, et al., “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”, IEEE Transactions on Parallel and Distributed Systems, vol. 29, 2018, pp. 1030-1043.
PUB | PDF | DOI | WoS
 
[3]
2017 | Konferenzbeitrag | Angenommen | PUB-ID: 2912816
J. Ax, et al., “Comparing synchronous, mesochronous and asynchronous NoCs for GALS based MPSoC”, IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17), Accepted.
PUB
 
[2]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2909276
L. Keuck, et al., “Neuro control of a PFC rectifier for harmonic reduction at partial loads”, 2014 International Conference on Advances in Green Energy (ICAGE), Institute of Electrical and Electronics Engineers (IEEE), 2015.
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[1]
2015 | Konferenzbeitrag | PUB-ID: 2902041
M. Vohrmann, et al., “A 65 nm Standard Cell Library for Ultra Low-power Applications”, Presented at the 22nd European Conference on Circuit Theory and Design, ECCTD2015, Trondheim, Norway, IEEE, 2015.
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4 Publikationen

Alle markieren

[4]
2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905 OA
J. Ax, et al., “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”, IEEE Transactions on Parallel and Distributed Systems, vol. 29, 2018, pp. 1030-1043.
PUB | PDF | DOI | WoS
 
[3]
2017 | Konferenzbeitrag | Angenommen | PUB-ID: 2912816
J. Ax, et al., “Comparing synchronous, mesochronous and asynchronous NoCs for GALS based MPSoC”, IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17), Accepted.
PUB
 
[2]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2909276
L. Keuck, et al., “Neuro control of a PFC rectifier for harmonic reduction at partial loads”, 2014 International Conference on Advances in Green Energy (ICAGE), Institute of Electrical and Electronics Engineers (IEEE), 2015.
PUB | DOI
 
[1]
2015 | Konferenzbeitrag | PUB-ID: 2902041
M. Vohrmann, et al., “A 65 nm Standard Cell Library for Ultra Low-power Applications”, Presented at the 22nd European Conference on Circuit Theory and Design, ECCTD2015, Trondheim, Norway, IEEE, 2015.
PUB | DOI
 

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Zitationsstil: ieee

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