53 Publikationen

Alle markieren

[53]
2019 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2920469
M2DC – A Novel Heterogeneous Hyperscale Microserver Platform
Oleksiak, Ariel, M2DC – A Novel Heterogeneous Hyperscale Microserver Platform. Hardware Accelerators in Data Centers (). Cham, Switzerland, 2019
PUB | DOI
 
[52]
2018 | Zeitschriftenaufsatz | E-Veröff. vor dem Druck | PUB-ID: 2920468
FPGA-Based Vision Processing System for Automatic Online Player Tracking in Indoor Sports
Ibraheem, Omar Waleed, FPGA-Based Vision Processing System for Automatic Online Player Tracking in Indoor Sports. Journal of Signal Processing Systems (). , 2018
PUB | DOI | WoS
 
[51]
2018 | Konferenzbeitrag | PUB-ID: 2921314
Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision Applications
Klimeck, Daniel, Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision Applications. (). , 2018
PUB
 
[50]
2018 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2918788 OA
Accelerating Hamming Distance Comparisons for Locality Sensitive Hashing (LSH) using FPGAs
Kaiser, Martin, Accelerating Hamming Distance Comparisons for Locality Sensitive Hashing (LSH) using FPGAs. 12th CeBiTec Symposium - Big Data in Medicine and Biotechnology - Abstract Book 12 (). Bielefeld, 2018
PUB | PDF
 
[49]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2937407
The M2DC Approach towards Resource-efficient Computing
Agosta, Giovanni, The M2DC Approach towards Resource-efficient Computing. OPPORTUNITIES AND CHALLENGES for European Projects. Volume 1: EPS Portugal 2017/2018 (). Setúbal, Portugal, 2017
PUB | DOI
 
[48]
2017 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2912818
M2DC – Modular Microserver DataCentre with heterogeneous hardware
Oleksiak, Ariel, M2DC – Modular Microserver DataCentre with heterogeneous hardware. Microprocessors and Microsystems 52 (). , 2017
PUB | DOI | WoS
 
[47]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2912815
Reconfigurable Vision Processing System for Player Tracking in Indoor Sports
Ibraheem, Omar Waleed, Reconfigurable Vision Processing System for Player Tracking in Indoor Sports. Conference on Design and Architectures for Signal and Image Processing (DASIP 2017) (). Piscataway, NJ, 2017
PUB | DOI
 
[46]
2017 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2909430
FPGA-based Multi-Robot Tracking
Irwansyah, Arif, FPGA-based Multi-Robot Tracking. Journal of Parallel and Distributed Computing 107 (). , 2017
PUB | DOI | Download (ext.) | WoS
 
[45]
2017 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2918683 OA
A Reconfigurable Heterogeneous Microserver Architecture for Energy-efficient Computing
Kaiser, Martin, A Reconfigurable Heterogeneous Microserver Architecture for Energy-efficient Computing. Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC'17) (). Denver, CO, 2017
PUB | PDF | Download (ext.)
 
[44]
2017 | Konferenzbeitrag | PUB-ID: 2909584
M2DC: Modular Microserver Datacentre with Heterogeneous Hardware
Oleksiak, Ariel, M2DC: Modular Microserver Datacentre with Heterogeneous Hardware. (). , 2017
PUB
 
[43]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2915029
Entwurf eines FPGA-basierten Verbindungsknotens als Prototypenumgebung für energieeffiziente und sichere Gebäudeautomationssysteme
Tlatlik, Jan, Entwurf eines FPGA-basierten Verbindungsknotens als Prototypenumgebung für energieeffiziente und sichere Gebäudeautomationssysteme. Tag des Systems Engineering: Paderborn, 8. -10. November 2017 (). München, 2017
PUB
 
[42]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2909044
From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining
Lachmair, Jan, From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining. International Joint Conference on Neural Networks (IJCNN 2017) (). , 2017
PUB
 
[41]
2016 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2908973
OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems
Cozzi, Dario, OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems. IEEE Transactions on Emerging Topics in Computing PP (99). , 2016
PUB | DOI | WoS
 
[40]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2908974
Data centres for IoT applications: The M2DC approach (Invited paper)
Oleksiak, Ariel, Data centres for IoT applications: The M2DC approach (Invited paper). 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (). , 2016
PUB | DOI
 
[39]
2016 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2903257 OA
Energy Efficiency of Sequence Alignment Tools - Software and Hardware Perspectives
Kierzynka, Michal, Energy Efficiency of Sequence Alignment Tools - Software and Hardware Perspectives. Future Generation Computer Systems 67 (). , 2016
PUB | PDF | DOI | Download (ext.) | WoS
 
[38]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2908980
The M2DC Project: Modular Microserver DataCentre
Cecowski, Mariano, The M2DC Project: Modular Microserver DataCentre. 2016 Euromicro Conference on Digital System Design (DSD) (). , 2016
PUB | DOI
 
[37]
2016 | Kurzbeitrag Konferenz / Poster | PUB-ID: 2909602 OA
FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers
Griessl, René, FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers. (). , 2016
PUB | Download (ext.)
 
[36]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901108
FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking
Irwansyah, Arif, FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking. ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on (). , 2015
PUB | DOI
 
[35]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901107
A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms
Ibraheem, Omar Waleed, A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms. ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on (). , 2015
PUB | DOI
 
[34]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2902039 OA
FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters
Griessl, René, FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters. (). , 2015
PUB | PDF
 
[33]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681323
Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications
Sabena, Davide, Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications. Proceedings of 19th IEEE European Test Symposium (ETS) (). , 2014
PUB | DOI | Download (ext.)
 
[32]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698999
Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems
Sorrenti, Domenico, Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems. (). , 2014
PUB | DOI | Download (ext.)
 
[31]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2699005
AXI-based SpaceFibre IP CORE Implementation
Cozzi, Dario, AXI-based SpaceFibre IP CORE Implementation. (). , 2014
PUB | DOI | Download (ext.)
 
[30]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698930
A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters
Griessl, René, A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters. Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014 (). , 2014
PUB | DOI | Download (ext.)
 
[29]
2014 | Konferenzbeitrag | PUB-ID: 2681362
An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems
Cassano, Luca, An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems. (). , 2014
PUB | DOI | Download (ext.)
 
[28]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2576115 OA
Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme
Korf, Sebastian, Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme. Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme (). , 2013
PUB | PDF
 
[27]
2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2622226
A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing
Sterpone, Luca, A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing. IEEE Transactions on Computers 62 (8). , 2013
PUB | DOI | WoS
 
[26]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681289
Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience
Desogus, Marco, Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience. RADECS proceedings 2 (). , 2013
PUB
 
[25]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681304
Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture
Sterpone, Luca, Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture. Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on (). , 2013
PUB | DOI | Download (ext.)
 
[24]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2576042
On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems
Cassano, Luca, On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013 (). Piscataway, NJ, 2013
PUB | DOI
 
[23]
2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2559365
Optimizing inter-FPGA communication by automatic channel adaptation
Romoth, Johannes, Optimizing inter-FPGA communication by automatic channel adaptation. Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on (). , 2012
PUB | DOI
 
[22]
2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2517354
A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing
Hagemeyer, Jens, A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing. 2012 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2012) (). Piscataway, NJ, 2012
PUB | DOI | Download (ext.)
 
[21]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493823
Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.
Grawinkel, M., Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.. MASCOTS2011 The 19th Annual Meeting of the IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems. (). , 2011
PUB | DOI | Download (ext.)
 
[20]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493819
Analysis of SEU Effects in Partially Reconfigurable SoPCs.
Sterpone, L., Analysis of SEU Effects in Partially Reconfigurable SoPCs.. Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011) (). , 2011
PUB | DOI
 
[19]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494507
Fast Design-space Exploration with FPGA Cluster
Romoth, Johannes, Fast Design-space Exploration with FPGA Cluster. DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing (). , 2011
PUB | Download (ext.)
 
[18]
2011 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2494497
Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications
Köster, Markus, Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications. DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing (). , 2011
PUB
 
[17]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286173
Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs
Korf, Sebastian, Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs. Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on (). , 2011
PUB | Download (ext.)
 
[16]
2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493826
Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.
Dittmann, Florian, Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.. Proceedings of the International SpaceWire Conference 2010 (). , 2010
PUB | Download (ext.)
 
[15]
2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472693 OA
RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing
Porrmann, Mario, RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing. Parallel Computing: From Multicores and GPU's to Petascale, Advances in Parallel Computing 19 (). , 2010
PUB | PDF
 
[14]
2010 | Patent | Veröffentlicht | PUB-ID: 2494087
Mehrprozessor-Computersystem
Christmann, W., Mehrprozessor-Computersystem. (). , 2010
PUB
 
[13]
2010 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2145423
Design Optimizations for Tiled Partially Reconfigurable Systems
Koester, M., Design Optimizations for Tiled Partially Reconfigurable Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (6). , 2010
PUB | DOI | WoS
 
[12]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472673
Design Optimizations to Improve Placeability of Partial Reconfiguration Modules
Koester, Markus, Design Optimizations to Improve Placeability of Partial Reconfiguration Modules. Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009) (). , 2009
PUB | DOI | Download (ext.)
 
[11]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472678
Rapid Prototyping of Next-Generation Multiprocessor SoCs
Porrmann, Mario, Rapid Prototyping of Next-Generation Multiprocessor SoCs. Proceedings of Semiconductor Conference Dresden, SCD 2009 (). Dresden, Germany, 2009
PUB
 
[10]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472686
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems
Grassi, Paolo Roberto, SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems. Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '09) (). Las Vegas, USA, 2009
PUB
 
[9]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144891
FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications
Paiz, Carlos, FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09) (). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia, 2009
PUB | DOI
 
[8]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144880
Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks
Pohl, Christopher, Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09) (). Sydney, Australia, 2009
PUB | DOI
 
[7]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144843 OA
FPGA-Based Realization of Self-Optimizing Drive-Controllers
Paiz, Carlos, FPGA-Based Realization of Self-Optimizing Drive-Controllers. the 35th Annual Conference of the IEEE Industrial Electronics Society (IECON 2009) (). , 2009
PUB | PDF | DOI | Download (ext.)
 
[6]
2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472725
Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures
Hagemeyer, Jens, Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures. 1. GI/ITG KuVS Fachgespräch Virtualisierung (). , 2008
PUB
 
[5]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472738
Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs
Hagemeyer, Jens, Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs. Proc. of the Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA '07) (). Las Vegas, USA, 2007
PUB | Download (ext.)
 
[4]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472729
Run-Time Reconfiguration of FPGA-Based Drive Controllers
Schulz, Bernd, Run-Time Reconfiguration of FPGA-Based Drive Controllers. European Conference on Power Electronics and Applications (EPE 2007) (). Aalborg, Denmark, 2007
PUB | DOI
 
[3]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472743
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS
Hagemeyer, Jens, A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS. Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL) (). Amsterdam, Netherlands, 2007
PUB | DOI
 
[2]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472748
INDRA – Integrated Design Flow for Reconfigurable Architectures
Hagemeyer, Jens, INDRA – Integrated Design Flow for Reconfigurable Architectures. Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth (). , 2007
PUB | Download (ext.)
 
[1]
2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2473942
Dedicated Module Access in Dynamically Reconfigurable Systems
Hagemeyer, Jens, Dedicated Module Access in Dynamically Reconfigurable Systems. Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS) (). , 2006
PUB | DOI
 

Suche

Publikationen filtern

Darstellung / Sortierung

Zitationsstil: default

Export / Einbettung

53 Publikationen

Alle markieren

[53]
2019 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2920469
M2DC – A Novel Heterogeneous Hyperscale Microserver Platform
Oleksiak, Ariel, M2DC – A Novel Heterogeneous Hyperscale Microserver Platform. Hardware Accelerators in Data Centers (). Cham, Switzerland, 2019
PUB | DOI
 
[52]
2018 | Zeitschriftenaufsatz | E-Veröff. vor dem Druck | PUB-ID: 2920468
FPGA-Based Vision Processing System for Automatic Online Player Tracking in Indoor Sports
Ibraheem, Omar Waleed, FPGA-Based Vision Processing System for Automatic Online Player Tracking in Indoor Sports. Journal of Signal Processing Systems (). , 2018
PUB | DOI | WoS
 
[51]
2018 | Konferenzbeitrag | PUB-ID: 2921314
Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision Applications
Klimeck, Daniel, Resource-efficient Reconfigurable Computer-on-Module for Embedded Vision Applications. (). , 2018
PUB
 
[50]
2018 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2918788 OA
Accelerating Hamming Distance Comparisons for Locality Sensitive Hashing (LSH) using FPGAs
Kaiser, Martin, Accelerating Hamming Distance Comparisons for Locality Sensitive Hashing (LSH) using FPGAs. 12th CeBiTec Symposium - Big Data in Medicine and Biotechnology - Abstract Book 12 (). Bielefeld, 2018
PUB | PDF
 
[49]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2937407
The M2DC Approach towards Resource-efficient Computing
Agosta, Giovanni, The M2DC Approach towards Resource-efficient Computing. OPPORTUNITIES AND CHALLENGES for European Projects. Volume 1: EPS Portugal 2017/2018 (). Setúbal, Portugal, 2017
PUB | DOI
 
[48]
2017 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2912818
M2DC – Modular Microserver DataCentre with heterogeneous hardware
Oleksiak, Ariel, M2DC – Modular Microserver DataCentre with heterogeneous hardware. Microprocessors and Microsystems 52 (). , 2017
PUB | DOI | WoS
 
[47]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2912815
Reconfigurable Vision Processing System for Player Tracking in Indoor Sports
Ibraheem, Omar Waleed, Reconfigurable Vision Processing System for Player Tracking in Indoor Sports. Conference on Design and Architectures for Signal and Image Processing (DASIP 2017) (). Piscataway, NJ, 2017
PUB | DOI
 
[46]
2017 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2909430
FPGA-based Multi-Robot Tracking
Irwansyah, Arif, FPGA-based Multi-Robot Tracking. Journal of Parallel and Distributed Computing 107 (). , 2017
PUB | DOI | Download (ext.) | WoS
 
[45]
2017 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2918683 OA
A Reconfigurable Heterogeneous Microserver Architecture for Energy-efficient Computing
Kaiser, Martin, A Reconfigurable Heterogeneous Microserver Architecture for Energy-efficient Computing. Third International Workshop on Heterogeneous High-performance Reconfigurable Computing (H2RC'17) (). Denver, CO, 2017
PUB | PDF | Download (ext.)
 
[44]
2017 | Konferenzbeitrag | PUB-ID: 2909584
M2DC: Modular Microserver Datacentre with Heterogeneous Hardware
Oleksiak, Ariel, M2DC: Modular Microserver Datacentre with Heterogeneous Hardware. (). , 2017
PUB
 
[43]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2915029
Entwurf eines FPGA-basierten Verbindungsknotens als Prototypenumgebung für energieeffiziente und sichere Gebäudeautomationssysteme
Tlatlik, Jan, Entwurf eines FPGA-basierten Verbindungsknotens als Prototypenumgebung für energieeffiziente und sichere Gebäudeautomationssysteme. Tag des Systems Engineering: Paderborn, 8. -10. November 2017 (). München, 2017
PUB
 
[42]
2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2909044
From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining
Lachmair, Jan, From CPU to FPGA – Acceleration of Self-Organizing Maps for Data Mining. International Joint Conference on Neural Networks (IJCNN 2017) (). , 2017
PUB
 
[41]
2016 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2908973
OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems
Cozzi, Dario, OLT(RE)²: an On-Line on-demand Testing approach for permanent Radiation Effects in REconfigurable systems. IEEE Transactions on Emerging Topics in Computing PP (99). , 2016
PUB | DOI | WoS
 
[40]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2908974
Data centres for IoT applications: The M2DC approach (Invited paper)
Oleksiak, Ariel, Data centres for IoT applications: The M2DC approach (Invited paper). 2016 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS) (). , 2016
PUB | DOI
 
[39]
2016 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2903257 OA
Energy Efficiency of Sequence Alignment Tools - Software and Hardware Perspectives
Kierzynka, Michal, Energy Efficiency of Sequence Alignment Tools - Software and Hardware Perspectives. Future Generation Computer Systems 67 (). , 2016
PUB | PDF | DOI | Download (ext.) | WoS
 
[38]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2908980
The M2DC Project: Modular Microserver DataCentre
Cecowski, Mariano, The M2DC Project: Modular Microserver DataCentre. 2016 Euromicro Conference on Digital System Design (DSD) (). , 2016
PUB | DOI
 
[37]
2016 | Kurzbeitrag Konferenz / Poster | PUB-ID: 2909602 OA
FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers
Griessl, René, FiPS and M2DC: Novel Architectures for Reconfigurable Hyperscale Servers. (). , 2016
PUB | Download (ext.)
 
[36]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901108
FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking
Irwansyah, Arif, FPGA-based circular hough transform with graph clustering for vision-based multi-robot tracking. ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on (). , 2015
PUB | DOI
 
[35]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2901107
A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms
Ibraheem, Omar Waleed, A resource-efficient multi-camera GigE vision IP core for embedded vision processing platforms. ReConFigurable Computing and FPGAs (ReConFig), 2015 International Conference on (). , 2015
PUB | DOI
 
[34]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2902039 OA
FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters
Griessl, René, FPGA-accelerated Heterogeneous Hyperscale Server Architecture for Next-Generation Compute Clusters. (). , 2015
PUB | PDF
 
[33]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681323
Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications
Sabena, Davide, Reconfigurable High Performance Architectures: How much are they ready for safety-critical applications. Proceedings of 19th IEEE European Test Symposium (ETS) (). , 2014
PUB | DOI | Download (ext.)
 
[32]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698999
Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems
Sorrenti, Domenico, Exploiting Dynamic Partial Reconfiguration for On-Line On-Demand Testing of Permanent Faults in Reconfigurable Systems. (). , 2014
PUB | DOI | Download (ext.)
 
[31]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2699005
AXI-based SpaceFibre IP CORE Implementation
Cozzi, Dario, AXI-based SpaceFibre IP CORE Implementation. (). , 2014
PUB | DOI | Download (ext.)
 
[30]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698930
A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters
Griessl, René, A Scalable Server Architecture for Next-Generation Heterogeneous Compute Clusters. Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, EUC 2014 (). , 2014
PUB | DOI | Download (ext.)
 
[29]
2014 | Konferenzbeitrag | PUB-ID: 2681362
An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems
Cassano, Luca, An Inter-Processor Communication Interface for Data-Flow Centric Heterogeneous Embedded Multiprocessor Systems. (). , 2014
PUB | DOI | Download (ext.)
 
[28]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2576115 OA
Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme
Korf, Sebastian, Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme. Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme (). , 2013
PUB | PDF
 
[27]
2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2622226
A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing
Sterpone, Luca, A Novel Fault Tolerant and Runtime Reconfigurable Platform for Satellite Payload Processing. IEEE Transactions on Computers 62 (8). , 2013
PUB | DOI | WoS
 
[26]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681289
Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience
Desogus, Marco, Hardening Dynamically Reconfigurable Processing Modules Architectures: A Neutron Test Experience. RADECS proceedings 2 (). , 2013
PUB
 
[25]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2681304
Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture
Sterpone, Luca, Dynamic neutron testing of Dynamically Reconfigurable Processing Modules architecture. Adaptive Hardware and Systems (AHS), 2013 NASA/ESA Conference on (). , 2013
PUB | DOI | Download (ext.)
 
[24]
2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2576042
On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems
Cassano, Luca, On-Line Testing of Permanent Radiation Effects in Reconfigurable Systems. Design, Automation & Test in Europe Conference & Exhibition (DATE), 2013 (). Piscataway, NJ, 2013
PUB | DOI
 
[23]
2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2559365
Optimizing inter-FPGA communication by automatic channel adaptation
Romoth, Johannes, Optimizing inter-FPGA communication by automatic channel adaptation. Reconfigurable Computing and FPGAs (ReConFig), 2012 International Conference on (). , 2012
PUB | DOI
 
[22]
2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2517354
A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing
Hagemeyer, Jens, A Scalable Platform for Run-time Reconfigurable Satellite Payload Processing. 2012 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2012) (). Piscataway, NJ, 2012
PUB | DOI | Download (ext.)
 
[21]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493823
Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.
Grawinkel, M., Evaluation of Applied Intra-Disk Redundancy Schemes to Improve Single Disk Reliability.. MASCOTS2011 The 19th Annual Meeting of the IEEE International Symposium on Modeling, Analysis and Simulation of Computer and Telecommunication Systems. (). , 2011
PUB | DOI | Download (ext.)
 
[20]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493819
Analysis of SEU Effects in Partially Reconfigurable SoPCs.
Sterpone, L., Analysis of SEU Effects in Partially Reconfigurable SoPCs.. Proceedings of NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2011) (). , 2011
PUB | DOI
 
[19]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2494507
Fast Design-space Exploration with FPGA Cluster
Romoth, Johannes, Fast Design-space Exploration with FPGA Cluster. DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing (). , 2011
PUB | Download (ext.)
 
[18]
2011 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2494497
Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications
Köster, Markus, Design Flow for a Fault-Tolerant Reconfigurable Multi-FPGA Architecture for Space Applications. DATE 2011 Workshop on Design Methods and Tools for FPGA-Based Acceleration of Scientific Computing (). , 2011
PUB
 
[17]
2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2286173
Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs
Korf, Sebastian, Automatic HDL-Based Generation of Homogeneous Hard Macros for FPGAs. Field-Programmable Custom Computing Machines (FCCM), 2011 IEEE 19th Annual International Symposium on (). , 2011
PUB | Download (ext.)
 
[16]
2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493826
Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.
Dittmann, Florian, Implementation of a Dynamically Reconfigurable Processing Module for SpaceWire Networks.. Proceedings of the International SpaceWire Conference 2010 (). , 2010
PUB | Download (ext.)
 
[15]
2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472693 OA
RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing
Porrmann, Mario, RAPTOR – A Scalable Platform for Rapid Prototyping and FPGA-based Cluster Computing. Parallel Computing: From Multicores and GPU's to Petascale, Advances in Parallel Computing 19 (). , 2010
PUB | PDF
 
[14]
2010 | Patent | Veröffentlicht | PUB-ID: 2494087
Mehrprozessor-Computersystem
Christmann, W., Mehrprozessor-Computersystem. (). , 2010
PUB
 
[13]
2010 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2145423
Design Optimizations for Tiled Partially Reconfigurable Systems
Koester, M., Design Optimizations for Tiled Partially Reconfigurable Systems. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (6). , 2010
PUB | DOI | WoS
 
[12]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472673
Design Optimizations to Improve Placeability of Partial Reconfiguration Modules
Koester, Markus, Design Optimizations to Improve Placeability of Partial Reconfiguration Modules. Proceedings of the International Conference on Design, Automation and Test in Europe (DATE 2009) (). , 2009
PUB | DOI | Download (ext.)
 
[11]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472678
Rapid Prototyping of Next-Generation Multiprocessor SoCs
Porrmann, Mario, Rapid Prototyping of Next-Generation Multiprocessor SoCs. Proceedings of Semiconductor Conference Dresden, SCD 2009 (). Dresden, Germany, 2009
PUB
 
[10]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472686
SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems
Grassi, Paolo Roberto, SiLLis: A Simplified Language for Monitoring and Debugging of Reconfigurable Systems. Proceedings of the International Conference on Engineering of Reconfigurable Systems and Algorithms (ERSA '09) (). Las Vegas, USA, 2009
PUB
 
[9]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144891
FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications
Paiz, Carlos, FPGA-in-the-Loop-Simulations for Dynamically Reconfigurable Applications. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT'09) (). The University of New South Wales, Sydney, Australia, 9-11, Sydney, Australia, 2009
PUB | DOI
 
[8]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144880
Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks
Pohl, Christopher, Using a Reconfigurable Compute Cluster for the Acceleration of Neural Networks. Proceedings of the 2009 International Conference on Field-Programmable Technology (FPT '09) (). Sydney, Australia, 2009
PUB | DOI
 
[7]
2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144843 OA
FPGA-Based Realization of Self-Optimizing Drive-Controllers
Paiz, Carlos, FPGA-Based Realization of Self-Optimizing Drive-Controllers. the 35th Annual Conference of the IEEE Industrial Electronics Society (IECON 2009) (). , 2009
PUB | PDF | DOI | Download (ext.)
 
[6]
2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472725
Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures
Hagemeyer, Jens, Hardware Virtualization Exploiting Dynamically Reconfigurable Architectures. 1. GI/ITG KuVS Fachgespräch Virtualisierung (). , 2008
PUB
 
[5]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472738
Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs
Hagemeyer, Jens, Design of Homogeneous Communication Infrastructures for Partially Reconfigurable FPGAs. Proc. of the Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA '07) (). Las Vegas, USA, 2007
PUB | Download (ext.)
 
[4]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472729
Run-Time Reconfiguration of FPGA-Based Drive Controllers
Schulz, Bernd, Run-Time Reconfiguration of FPGA-Based Drive Controllers. European Conference on Power Electronics and Applications (EPE 2007) (). Aalborg, Denmark, 2007
PUB | DOI
 
[3]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472743
A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS
Hagemeyer, Jens, A Design Methodology for Communication Infrastructures on Partially Reconfigurable FPGAS. Proceedings of the 17th International Conference on Field Programmable Logic and Applications (FPL) (). Amsterdam, Netherlands, 2007
PUB | DOI
 
[2]
2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2472748
INDRA – Integrated Design Flow for Reconfigurable Architectures
Hagemeyer, Jens, INDRA – Integrated Design Flow for Reconfigurable Architectures. Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth (). , 2007
PUB | Download (ext.)
 
[1]
2006 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2473942
Dedicated Module Access in Dynamically Reconfigurable Systems
Hagemeyer, Jens, Dedicated Module Access in Dynamically Reconfigurable Systems. Proceedings of the 20th International Parallel and Distributed Processing Symposium (IPDPS) (). , 2006
PUB | DOI
 

Suche

Publikationen filtern

Darstellung / Sortierung

Zitationsstil: default

Export / Einbettung