9 Publikationen

Alle markieren

[9]
2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905
J. Ax, et al., “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”, IEEE Transactions on Parallel and Distributed Systems, vol. 29, 2018, pp. 1030-1043.
PUB | PDF | DOI | WoS
 
[8]
2018 | Konferenzbeitrag | PUB-ID: 2921315
C. Klarhorst, et al., “Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems”, Presented at the 6th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES 2018), Manchester, United Kingdom, 2018.
PUB
 
[7]
2017 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2908972
G. Sievers, et al., “The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio”, Computing Platforms for Software-Defined Radio, W. Hussain, et al., eds., Cham, Switzerland: Springer International Publishing, 2017, pp.29--59.
PUB | DOI
 
[6]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2900363
M. Flasskamp, et al., “Performance Estimation of Streaming Applications for Hierarchical MPSoCs”, Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), ACM Press, 2016.
PUB | PDF | DOI
 
[5]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732427
G. Sievers, et al., “Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI”, 2015 IEEE International Symposium on Circuits & Systems (ISCAS), IEEE, 2015, pp.1925-1928.
PUB | DOI | Download (ext.)
 
[4]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2760622
G. Sievers, et al., “Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI”, International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), IEEE, 2015, pp.175-181.
PUB | DOI
 
[3]
2015 | Report | PUB-ID: 2783874
J. Ax, et al., An Abstract Model for Performance Estimation of the Embedded Multiprocessor CoreVA-MPSoC Technical Report (v1.0), 2015.
PUB | PDF
 
[2]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2783142
J. Ax, et al., “System-Level Analysis of Network Interfaces for Hierarchical MPSoCs”, Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc), New York, NY, USA: ACM, 2015, pp.3-8.
PUB | PDF | DOI
 
[1]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2753235
W. Kelly, et al., “A Communication Model and Partitioning Algorithm for Streaming Applications for an Embedded MPSoC”, International Symposium on System-on-Chip (SoC), Tampere, Finland: IEEE, 2014.
PUB | DOI | Download (ext.)
 

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9 Publikationen

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[9]
2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905
J. Ax, et al., “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”, IEEE Transactions on Parallel and Distributed Systems, vol. 29, 2018, pp. 1030-1043.
PUB | PDF | DOI | WoS
 
[8]
2018 | Konferenzbeitrag | PUB-ID: 2921315
C. Klarhorst, et al., “Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems”, Presented at the 6th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES 2018), Manchester, United Kingdom, 2018.
PUB
 
[7]
2017 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2908972
G. Sievers, et al., “The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio”, Computing Platforms for Software-Defined Radio, W. Hussain, et al., eds., Cham, Switzerland: Springer International Publishing, 2017, pp.29--59.
PUB | DOI
 
[6]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2900363
M. Flasskamp, et al., “Performance Estimation of Streaming Applications for Hierarchical MPSoCs”, Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), ACM Press, 2016.
PUB | PDF | DOI
 
[5]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732427
G. Sievers, et al., “Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI”, 2015 IEEE International Symposium on Circuits & Systems (ISCAS), IEEE, 2015, pp.1925-1928.
PUB | DOI | Download (ext.)
 
[4]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2760622
G. Sievers, et al., “Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI”, International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), IEEE, 2015, pp.175-181.
PUB | DOI
 
[3]
2015 | Report | PUB-ID: 2783874
J. Ax, et al., An Abstract Model for Performance Estimation of the Embedded Multiprocessor CoreVA-MPSoC Technical Report (v1.0), 2015.
PUB | PDF
 
[2]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2783142
J. Ax, et al., “System-Level Analysis of Network Interfaces for Hierarchical MPSoCs”, Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc), New York, NY, USA: ACM, 2015, pp.3-8.
PUB | PDF | DOI
 
[1]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2753235
W. Kelly, et al., “A Communication Model and Partitioning Algorithm for Streaming Applications for an Embedded MPSoC”, International Symposium on System-on-Chip (SoC), Tampere, Finland: IEEE, 2014.
PUB | DOI | Download (ext.)
 

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