9 Publikationen

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[9]
2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905
Ax, J., et al., 2018. CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems, 29(5), p 1030-1043.
PUB | PDF | DOI | WoS
 
[8]
2018 | Konferenzbeitrag | PUB-ID: 2921315
Klarhorst, C., et al., 2018. Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems. Presented at the 6th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES 2018), Manchester, United Kingdom.
PUB
 
[7]
2017 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2908972
Sievers, G., et al., 2017. The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio. In W. Hussain, et al., eds. Computing Platforms for Software-Defined Radio. Cham, Switzerland: Springer International Publishing, pp. 29--59.
PUB | DOI
 
[6]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2900363
Flasskamp, M., et al., 2016. Performance Estimation of Streaming Applications for Hierarchical MPSoCs. In Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO). ACM Press.
PUB | PDF | DOI
 
[5]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732427
Sievers, G., et al., 2015. Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI. In 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE, pp. 1925-1928.
PUB | DOI | Download (ext.)
 
[4]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2760622
Sievers, G., et al., 2015. Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI. In International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC). IEEE, pp. 175-181.
PUB | DOI
 
[3]
2015 | Report | PUB-ID: 2783874
Ax, J., et al., 2015. An Abstract Model for Performance Estimation of the Embedded Multiprocessor CoreVA-MPSoC Technical Report (v1.0),
PUB | PDF
 
[2]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2783142
Ax, J., et al., 2015. System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc). New York, NY, USA: ACM, pp. 3-8.
PUB | PDF | DOI
 
[1]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2753235
Kelly, W., et al., 2014. A Communication Model and Partitioning Algorithm for Streaming Applications for an Embedded MPSoC. In International Symposium on System-on-Chip (SoC). Tampere, Finland: IEEE.
PUB | DOI | Download (ext.)
 

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9 Publikationen

Alle markieren

[9]
2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905
Ax, J., et al., 2018. CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories. IEEE Transactions on Parallel and Distributed Systems, 29(5), p 1030-1043.
PUB | PDF | DOI | WoS
 
[8]
2018 | Konferenzbeitrag | PUB-ID: 2921315
Klarhorst, C., et al., 2018. Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems. Presented at the 6th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES 2018), Manchester, United Kingdom.
PUB
 
[7]
2017 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2908972
Sievers, G., et al., 2017. The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio. In W. Hussain, et al., eds. Computing Platforms for Software-Defined Radio. Cham, Switzerland: Springer International Publishing, pp. 29--59.
PUB | DOI
 
[6]
2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2900363
Flasskamp, M., et al., 2016. Performance Estimation of Streaming Applications for Hierarchical MPSoCs. In Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO). ACM Press.
PUB | PDF | DOI
 
[5]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732427
Sievers, G., et al., 2015. Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI. In 2015 IEEE International Symposium on Circuits & Systems (ISCAS). IEEE, pp. 1925-1928.
PUB | DOI | Download (ext.)
 
[4]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2760622
Sievers, G., et al., 2015. Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI. In International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC). IEEE, pp. 175-181.
PUB | DOI
 
[3]
2015 | Report | PUB-ID: 2783874
Ax, J., et al., 2015. An Abstract Model for Performance Estimation of the Embedded Multiprocessor CoreVA-MPSoC Technical Report (v1.0),
PUB | PDF
 
[2]
2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2783142
Ax, J., et al., 2015. System-Level Analysis of Network Interfaces for Hierarchical MPSoCs. In Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc). New York, NY, USA: ACM, pp. 3-8.
PUB | PDF | DOI
 
[1]
2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2753235
Kelly, W., et al., 2014. A Communication Model and Partitioning Algorithm for Streaming Applications for an Embedded MPSoC. In International Symposium on System-on-Chip (SoC). Tampere, Finland: IEEE.
PUB | DOI | Download (ext.)
 

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