PUB - Publikationen an der Universität Bielefeld

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• [66]
  

  2023 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2982807

  S. Ullah, et al., “Exploring spiking neural networks: a comprehensive analysis of mathematical models and applications”, Frontiers in Computational Neuroscience, vol. 17, 2023.

  PUB | PDF | DOI | WoS | PubMed | Europe PMC
   
• [65]
  

  2023 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2985715

  S. Koravuna, et al., “Digit Recognition Using Spiking Neural Networks on FPGA”, Advances in Computational Intelligence. 17th International Work-Conference on Artificial Neural Networks, IWANN 2023, Ponta Delgada, Portugal, June 19–21, 2023, Proceedings, Part I, I. Rojas, G. Joya, and A. Catala, eds., Lecture Notes in Computer Science, Cham: Springer Nature Switzerland, 2023, pp.406-417.

  PUB | DOI
   
• [64]
  

  2023 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2985713

  S. Ullah and T. Jungeblut, “Analysis of MR Images for Early and Accurate Detection of Brain Tumor using Resource Efficient Simulator Brain Analysis”, 19th International Conference on Machine Learning and Data Mining MLDM, New York USA: 2023.

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• [63]
  

  2023 | Kurzbeitrag Konferenz / Poster | Veröffentlicht | PUB-ID: 2985712

  S. Ullah, et al., “A Hybrid Spiking-Convolutional Neural Network Approach for Advancing High-Quality Image Inpainting”, International Conference on Computer Vision (ICCV) 2023, Paris France : 2023.

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• [62]
  

  2023 | Konferenzbeitrag | Angenommen | PUB-ID: 2985188

  S. Ullah, et al., “A Novel Spike Vision Approach for Robust Multi-Object Detection using SNNs”, Presented at the Novel Trends in Data Science 2023, Congressi Stefano Franscini at Monte Verità in Ticino, Switzerland, Accepted.

  PUB | DOI | Download (ext.) | Preprint
   
• [61]
  

  2023 | Konferenzbeitrag | PUB-ID: 2983660

  S. Ullah, et al., “Transforming Event-Based into Spike-Rate Datasets for Enhancing Neuronal Behavior Simulation to Bridging the Gap for SNNs”, Presented at the International Conference on Computer Vision (ICCV) 2023, Paris France, Paris France : Published, 2023.

  PUB | DOI
   
• [60]
  

  2023 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2982808

  S. Ullah, et al., “Evaluation of Spiking Neural Nets-Based Image Classification Using the Runtime Simulator RAVSim”, International Journal of Neural Systems, vol. 33, 2023, : 2350044.

  PUB | DOI | WoS | PubMed | Europe PMC
   
• [59]
  

  2023 | Kurzbeitrag Konferenz / Poster | PUB-ID: 2982810

  S. Ullah, et al., “Evaluating Spiking Neural Network Models: A Comparative Performance Analysis”, Bielefeld : Datatninja Spring School 2023, 2023.

  PUB | DOI
   
• [58]
  

  2023 | Kurzbeitrag Konferenz / Poster | PUB-ID: 2982811

  S. Ullah, et al., “Design-Space Exploration of SNN Models using Application-Specific Multi-Core Architectures”, University of Texas at San Antonio: Neuro-Inspired Computing Elements (NICE 2023), 2023.

  PUB | DOI
   
• [57]
  

  2023 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2982809

  S. Ullah, et al., “Streamlined Training of GCN for Node Classification with Automatic Loss Function and Optimizer Selection”, Engineering Applications of Neural Networks. 24th International Conference, EAAAI/EANN 2023, León, Spain, June 14–17, 2023, Proceedings, L. Iliadis, et al., eds., Communications in Computer and Information Science, Cham: Springer Nature Switzerland, 2023, pp.191-202.

  PUB | DOI
   
• [56]
  

  2022 | Kurzbeitrag Konferenz / Poster | PUB-ID: 2982814

  S. Ullah, et al., “Real-Time Resource Efficient Simulator for SNNs-based Model Experimentation”, Bielefeld : Datatninja Spring School 2022, 2022.

  PUB | DOI
   
• [55]
  

  2022 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2979461

  S. Ullah, et al., “SNNs Model Analyzing and Visualizing Experimentation Using RAVSim”, Engineering Applications of Neural Networks. 23rd International Conference, EAAAI/EANN 2022, Chersonissos, Crete, Greece, June 17–20, 2022, Proceedings, L. Iliadis, et al., eds., Communications in Computer and Information Science, Cham: Springer International Publishing, 2022, pp.40-51.

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• [54]
  

  2022 | Preprint | PUB-ID: 2982804

  S. Ullah, et al., “NireHApS: Neuro-Inspired and Resource-Efficient Hardware-Architectures for Plastic SNNs”, 2022.

  PUB | DOI
   
• [53]
  

  2019 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2979460

  J. Ax, et al., “Asynchronous network-on-chips (NoCs) for resource efficient many core architectures”, Asynchronous Circuit Applications, J. Di and S.C. Smith, eds., Institution of Engineering and Technology (IET), 2019, pp.173-197.

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• [52]
  

  2019 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2939486

  M. Adams, et al., “Towards an SSVEP-BCI Controlled Smart Home”, 2019 IEEE International Conference on Systems, Man and Cybernetics (SMC), Piscataway, NJ: IEEE, 2019.

  PUB | DOI
   
• [51]
  

  2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2982045

  A. Cristal, et al., “LEGaTO. First steps towards energy-efficient toolset for heterogeneous computing”, SAMOS '18. Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, New York, NY: ACM, 2018, pp.210-217.

  PUB | DOI
   
• [50]
  

  2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2979448

  A. Cristal, et al., “LEGaTO. First steps towards energy-efficient toolset for heterogeneous computing”, Proceedings of the 18th International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, T. Mudge, ed., New York, NY, USA: ACM, 2018, pp.210-217.

  PUB | DOI
   
• [49]
  

  2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2955564

  A. Cristal, et al., “LEGaTO Project: Towards Energy-Efficient, Secure, Fault-tolerant Toolset for Heterogeneous Computing.”, Proceedings of the 15th ACM International Conference on Computing Frontiers, D. Kaeli, ed., New York, NY: ACM, 2018, pp.276-278.

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• [48]
  

  2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2979449

  N. Gayen, et al., “Scalable Mapping of Streaming Applications onto MPSoCs Using Optimistic Mixed Integer Linear Programming”, 26th Euromicro International Conference on Parallel, Distributed and Network-based Processing (PDP 2018), Piscataway, NJ: IEEE, 2018, pp.348-352.

  PUB | DOI
   
• [47]
  

  2018 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2932463

  M. Hesse, et al., “KogniCoach - Entwicklung und Evaluierung eines in das Wohnumfeld integrierten persönlichen Trainers mit vernetztem Sessel”, Technische Unterstützungssysteme, die die Menschen wirklich wollen, R. Weidner, A. Karafllidis, and Leopold-Franzens-Universität Innsbruck, Institut für Mechatronik, eds., Hamburg: Helmut-Schmidt Universität, 2018, pp.235-243.

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• [46]
  

  2018 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2915905

  J. Ax, et al., “CoreVA-MPSoC: A Many-core Architecture with Tightly Coupled Shared and Local Data Memories”, IEEE Transactions on Parallel and Distributed Systems, vol. 29, 2018, pp. 1030-1043.

  PUB | PDF | DOI | WoS
   
• [45]
  

  2018 | Report | Veröffentlicht | PUB-ID: 2934956

  T. Korthals, T. Krause, and T. Jungeblut, Elektronische Umfelderkennung bei Erntemaschinen. Verbundprojekt itsOWL-EUE innerhalb des Spitzenclusters it's OWL : Abschlussbericht des itsOWL-EUE Konsortiums, 2018.

  PUB | DOI
   
• [44]
  

  2018 | Konferenzbeitrag | PUB-ID: 2921315

  C. Klarhorst, et al., “Development of Energy Models for Design Space Exploration of Embedded Many-Core Systems”, Presented at the 6th International Workshop on High Performance Energy Efficient Embedded Systems (HIP3ES 2018), Manchester, United Kingdom, 2018.

  PUB
   
• [43]
  

  2017 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2911527

  F. Wittenfeld, M. Hesse, and T. Jungeblut, “Optische Vermessung bewegter Rotationskörper in industriellen Fertigungsanlagen”, Wissenschaftsforum Intelligente Technische Systeme (WInTeSys) 2017, E. Bodden, et al., eds., Verlagsschriftenreihe des Heinz Nixdorf Instituts, vol. 369, Paderborn: Heinz Nixdorf Institut, Universität Paderborn, 2017, pp.241-253.

  PUB
   
• [42]
  

  2017 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2914984

  M. Hesse, T. Born, and T. Jungeblut, “Modellgestützter Entwurf eines Multisensormoduls für die Gebäudeautomation”, Tag des Systems Engineering: Paderborn, 8. -10. November 2017, S.-O. Schulze, et al., eds., München: Carl Hanser Verlag GmbH Co KG, 2017, pp.35-44.

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• [41]
  

  2017 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2908972

  G. Sievers, et al., “The CoreVA-MPSoC: A Multiprocessor Platform for Software-Defined Radio”, Computing Platforms for Software-Defined Radio, W. Hussain, et al., eds., Cham, Switzerland: Springer International Publishing, 2017, pp.29--59.

  PUB | DOI
   
• [40]
  

  2017 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2909571

  M. Hesse, et al., “A Connected Chair as Part of a Smart Home Environment”, Proceedings of IEEE 14th International Conference on Wearable and Implantable Body Sensor Networks, 2017, pp. 47-50.

  PUB | PDF | DOI
   
• [39]
  

  2017 | Konferenzbeitrag | Angenommen | PUB-ID: 2912816

  J. Ax, et al., “Comparing synchronous, mesochronous and asynchronous NoCs for GALS based MPSoC”, IEEE 11th International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC-17), Accepted.

  PUB
   
• [38]
  

  2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2900363

  M. Flasskamp, et al., “Performance Estimation of Streaming Applications for Hierarchical MPSoCs”, Workshop on Rapid Simulation and Performance Evaluation: Methods and Tools (RAPIDO), New York, NY: ACM Press, 2016, pp.1.

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• [37]
  

  2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2906479

  M. Kragh, et al., “Multi-Modal Obstacle Detection and Evaluation of Occupancy Grid Mapping in Agriculture”, International Conference on Agricultural Engineering, Aarhus: International Commission of Agricultural and Biosystems Engineering, 2016.

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• [36]
  

  2016 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2902860

  T. Korthals, et al., “Evidenzkarten-basierte Sensorfusion zur Umfelderkennung und Interpretation in der Ernte”, Informatik in der Land-, Forst- und Ernährungswirtschaft - Intelligente Systeme - Stand der Technik und neue Möglichkeiten, A. Ruckelshausen, et al., eds., 2016, pp.97-100.

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• [35]
  

  2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2783142

  J. Ax, et al., “System-Level Analysis of Network Interfaces for Hierarchical MPSoCs”, Proceedings of the 8th International Workshop on Network on Chip Architectures (NoCArc), New York, NY, USA: ACM, 2015, pp.3-8.

  PUB | PDF | DOI
   
• [34]
  

  2015 | Report | PUB-ID: 2783874

  J. Ax, et al., An Abstract Model for Performance Estimation of the Embedded Multiprocessor CoreVA-MPSoC Technical Report (v1.0), 2015.

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• [33]
  

  2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732427

  G. Sievers, et al., “Evaluation of Interconnect Fabrics for an Embedded MPSoC in 28 nm FD-SOI”, 2015 IEEE International Symposium on Circuits & Systems (ISCAS), IEEE, 2015, pp.1925-1928.

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• [32]
  

  2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2760622

  G. Sievers, et al., “Comparison of Shared and Private L1 Data Memories for an Embedded MPSoC in 28nm FD-SOI”, International Symposium on Embedded Multicore/Many-core Systems-on-Chip (MCSoC), IEEE, 2015, pp.175-181.

  PUB | DOI
   
• [31]
  

  2015 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2759093

  U. Damerow, et al., “Intelligente Biegeverfahren”, wt Werkstattstechnik online, vol. 2015, 2015, pp. 427-432.

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• [30]
  

  2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2909276

  L. Keuck, et al., “Neuro control of a PFC rectifier for harmonic reduction at partial loads”, 2014 International Conference on Advances in Green Energy (ICAGE), Institute of Electrical and Electronics Engineers (IEEE), 2015.

  PUB | DOI
   
• [29]
  

  2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2757836

  J. Ax, et al., “Universelle Echtzeit-Ethernet Architektur zur Integration in rekonfigurierbare Automatisierungssysteme”, Presented at the 45. Jahrestagung der Gesellschaft für Informatik (INFORMATIK), Cottbus, 2015.

  PUB
   
• [28]
  

  2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732419

  A. Buda, et al., “Automatische Protokollanpassung von Echtzeit-Ethernet-Standards durch FPGA-Technologien”, Presented at the Automation 2015, Baden-Baden, 2015.

  PUB
   
• [27]
  

  2015 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2752706

  C. Ragg, T. Jungeblut, and B. Jurke, “Intelligente Werkzeugmaschinen”, wt Werkstattstechnik online, vol. 105, 2015, pp. 252-256.

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• [26]
  

  2015 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2732431

  S. Herbrechtsmeier, T. Jungeblut, and M. Porrmann, “Datenflussmodellierung als Methode zur Optimierung von Entwicklungsprozessen am Beispiel der Leiterplattenentwicklung”, Entwurf mechatronischer Systeme, vol. 343, Paderborn: HNI Verlagsschriftenreihe, 2015.

  PUB
   
• [25]
  

  2015 | Konferenzbeitrag | PUB-ID: 2902041

  M. Vohrmann, et al., “A 65 nm Standard Cell Library for Ultra Low-power Applications”, Presented at the 22nd European Conference on Circuit Theory and Design, ECCTD2015, Trondheim, Norway, IEEE, 2015.

  PUB | DOI
   
• [24]
  

  2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2700385

  W. Schaermann, et al., “Selbstkorrigierende Biegeprozesse in der Umformtechnik”, Automation 2014 Smart X - powered by automation. Teil 2, P. Adolphs, ed., Verein Deutscher Ingenieure: VDI-Berichte, vol. 2231, Düsseldorf: VDI-Verlag, 2014, pp.1103-1116.

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• [23]
  

  2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698994

  M. Walter, et al., “Dynamische Rekonfiguration von Echtzeit-Ethernet-Standards mit harten Echtzeit­anforderungen”, Presented at the Kommunikation in der Automation – KommA 2014, Lemgo, Germany, 2014.

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• [22]
  

  2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2698929

  B. Hübener, et al., “CoreVA: A Configurable Resource-efficient VLIW Processor Architecture”, Proceedings of the 12th IEEE International Conference on Embedded and Ubiquitous Computing, IEEE, 2014, pp.9-16.

  PUB | DOI
   
• [21]
  

  2014 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2753235

  W. Kelly, et al., “A Communication Model and Partitioning Algorithm for Streaming Applications for an Embedded MPSoC”, International Symposium on System-on-Chip (SoC), Tampere, Finland: IEEE, 2014.

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• [20]
  

  2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2560236

  S. Lütkemeier, et al., “A 65 nm 32 b Subthreshold Processor With 9T Multi-Vt SRAM and Adaptive Supply Voltage Control”, IEEE Journal Of Solid-State Circuits, vol. 48, 2013, pp. 8-19.

  PUB | DOI | WoS
   
• [19]
  

  2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2576115

  S. Korf, et al., “Dynamisch rekonfigurierbare Hardware als Basistechnologie für intelligente technische Systeme”, Proceedings Wissenschaftsforum 2013 Intelligente Technische Systeme, J. Gausemeier, et al., eds., HNI-Verlagsschriftenreihe, vol. 310, Paderborn: Heinz-Nixdorf-Inst., Univ. Paderborn, 2013, pp.79-90.

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• [18]
  

  2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2637667

  G. Sievers, et al., “Design-Space Exploration of the Configurable 32 bit VLIW Processor CoreVA for Signal Processing Applications”, 2013 NORCHIP, 2013.

  PUB | DOI
   
• [17]
  

  2013 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2634649

  P. Christ, et al., “Pareto-optimal Signal Processing on Low-Power Microprocessors”, Proceedings of the 12th IEEE International Conference on SENSORS, IEEE, 2013, pp.1843-1846.

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• [16]
  

  2013 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2634614

  T. Jungeblut, et al., “A Systematic Approach for Optimized Bypass Configurations for Application-specific Embedded Processors”, ACM Trans. Embed. Comput. Syst., vol. 13, 2013, pp. 1-25.

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• [15]
  

  2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2475063

  S. Lütkemeier, et al., “A 200mV 32b Subthreshold Processor with Adaptive Supply Voltage Control”, Proc. of the International Solid-State Circuits Conference (ISSCC), Institute of Electrical and Electronics Engineers, ed., Piscataway, NJ: IEEE, 2012, pp.484-485.

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• [14]
  

  2012 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2493813

  T. Jungeblut, et al., “A TCMS-based architecture for GALS NoCs.”, 2012 IEEE International Symposium on Circuits and Systems, IEEE Circuits and Systems Society and Institute of Electrical and Electronics Engineers, eds., Piscataway, NJ: IEEE, 2012.

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• [13]
  

  2011 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2476993

  T. Jungeblut, et al., “Resource Efficiency of Scalable Processor Architectures for SDR-based Applications (Invited)”, Proc. of the Radar, Communication and Measurement Conference (RADCOM), 2011.

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• [12]
  

  2011 | Bielefelder E-Dissertation | PUB-ID: 2407551

  T. Jungeblut, Entwurfsraumexploration ressourceneffizienter VLIW-Prozessoren, Bielefeld: Universität Bielefeld, 2011.

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• [11]
  

  2011 | Sammelwerksbeitrag | Veröffentlicht | PUB-ID: 2018536

  T. Jungeblut, et al., “Design-space Exploration for Flexible WLAN Hardware”, Cross Layer Designs in WLAN Systems, N. Zorba, C. Skianis, and C. Verikoukis, eds., Leicester, UK: Troubador Publishing, 2011, pp.521-564.

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• [10]
  

  2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2018549

  T. Jungeblut, et al., “Design Space Exploration for Memory Subsystems of VLIW Architectures”, 5th IEEE International Conference on Networking, Architecture, and Storage, 2010, pp.377-385.

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• [9]
  

  2010 | Konferenzbeitrag | PUB-ID: 2286616

  T. Jungeblut, et al., “A Framework for the Design Space Exploration of Software-Defined Radio Applications”, 2nd International ICST Conference on Mobile Lightweight Wireless Systems, 2010.

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• [8]
  

  2010 | Konferenzbeitrag | PUB-ID: 2286628

  T. Jungeblut, et al., “A modular design flow for very large design space explorations”, CDNLive! EMEA 2010, 2010.

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• [7]
  

  2010 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2018541

  T. Jungeblut, et al., “Resource Efficiency of Hardware Extensions of a 4-issue VLIW Processor for Elliptic Curve Cryptography”, Advances in Radio Science, vol. 8, 2010, pp. 295-305.

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• [6]
  

  2010 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2019027

  R. Dreesen, et al., “Dependence Analysis of VLIW Code for Non-Interlocked Pipelines”, Proceedings of the 8th Workshop on Optimizations for DSP and Embedded Systems, 2010.

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• [5]
  

  2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144757

  R. Dreesen, et al., “A Synchronization Method for Register Traces of Pipelined Processors”, Proceedings of the International Embedded Systems Symposium 2009 (IESS '09), Schloss Langenargen, Germany: 2009, pp.207-217.

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• [4]
  

  2009 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2144830

  T. Jungeblut, et al., “Design Space Exploration for Next Generation Wireless Technologies (invited talk).”, Proc. of the Electrical and Electronic Engineering for Communication Conference (EEEfCOM) 2009, 2009.

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• [3]
  

  2008 | Zeitschriftenaufsatz | Veröffentlicht | PUB-ID: 2289237

  T. Jungeblut, et al., “Realtime multiprocessor for mobile ad hoc networks”, Advances in Radio Science, vol. 6, 2008, pp. 239-243.

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• [2]
  

  2008 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2289205

  T. Jungeblut, et al., “Design Space Exploration for Resource Efficient VLIW-Processors”, University Booth of the Design, Automation and Test in Europe (DATE) conference, 2008.

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• [1]
  

  2007 | Konferenzbeitrag | Veröffentlicht | PUB-ID: 2289057

  T. Jungeblut, et al., “Real-Time Multiprocessor SoC for Mobile Ad Hoc Networks”, Proceedings of the Conference on Design, Automation and Test in Europe (DATE '07) – University Booth, 2007, 2007.

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